SLVSIB0 December   2025 UCD91320

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Linearity Parameters
    7. 5.7 POR and BOR
    8. 5.8 Low Frequency Crystal/Clock
    9. 5.9 Flash Memory Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 TI Sequencer Studio Software
      2. 6.2.2 PMBUS Interface
      3. 6.2.3 PMBUS Security
    3. 6.3 Device Functional Modes
      1. 6.3.1 Black Box Fault Logging
      2. 6.3.2 PMBus Address Selection
      3. 6.3.3 Brownout
    4.     Failure Analysis and Returns
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

3 Description

The UCD91320 device is a 32-rail PMBus controlled power sequencer.

Dedicated pins (MONx) monitor up to 32 voltage rails in either analog or digital modes. 32 rail enable (ENx) pins allow regulators to be sequenced. 16 margining (MARx) pins can be used to push regulators to high or low limits (margins) for testing, or actively trim outputs for enhanced accuracy. The output state of 16 logical GPO (LGPOx) pins can be controlled by the state of GPIs, rail status, and other LGPOs.

Nonvolatile event logging preserves fault events after power dropout. The Black Box Fault Log preserves the fault information and the status of all rails. This occurs for the first fault as well as the last fault before a power down event. The cascading feature offers convenient ways to manage up to 128 voltage rails.

A user defined fault pin coordinates the cascaded devices to take synchronized fault responses. The user can select up to 8 groups of rail configurations using 3 GPIs. These configurations can implement system low-power modes as outlined in the Advanced Configuration and Power Interface (ACPI) specification.

The Sequencer Studio™ software is an intuitive PC-based graphic user interface (GUI) that can configure, store, and monitor all system operating parameters.

Packaging Information Table
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
UCD91320SPZR LQFP (100) 14.0 mm × 14.0 mm
UCD91320SZAWR nFBGA (100) 9.0 mm × 9.0 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
UCD91320 Simplified Application Diagram Figure 3-1 Simplified Application Diagram