SLVSIB0 December   2025 UCD91320

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Linearity Parameters
    7. 5.7 POR and BOR
    8. 5.8 Low Frequency Crystal/Clock
    9. 5.9 Flash Memory Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 TI Sequencer Studio Software
      2. 6.2.2 PMBUS Interface
      3. 6.2.3 PMBUS Security
    3. 6.3 Device Functional Modes
      1. 6.3.1 Black Box Fault Logging
      2. 6.3.2 PMBus Address Selection
      3. 6.3.3 Brownout
    4.     Failure Analysis and Returns
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.1 Overview

Electronic systems such as CPUs, DSPs, microcontrollers, FPGAs, and ASICs can have multiple voltage rails, and require precise power-ON and power-OFF sequences in order to function correctly. The UCD91320 can sequence up to 32 voltage rails, monitor voltages and fault conditions, and report system health information through a PMBus interface.

The UCD91320 protects electronic systems by enacting pre-configured responses to power system faults. A fault immediately triggers the Black Box Fault Log to store a comprehensive system status report, but subsequent fault logs are stored inside nonvolatile memory.

System reliability can be validated through four-corner testing. A voltage rail can be commanded to operate at the minimum and maximum output voltages – this is known as margining. The device can perform accurate closed-loop margining on up to 16 voltage rails. During normal operation, UCD91320 can actively trim DC output voltages using the same margining circuitry on those 16 pins.

The UCD91320 contains a pool of 32 GPIO pins. Many of these pins have primary functionality as ENx, MARx, or LGPOx pins, but they can also be configured as general purpose I/Os (GPIO) to allow the device to interact with external circuitry. The pin description table shows the primary functionality of each pin. GPIO states can be controlled in several ways:

  • Command-controlled GPO – These outputs can be set by PMBus commands
  • GPIOs – These pins can be used to generate faults, enable/disable margining, or influence the state of other GPIOs
  • Boolean-logic controlled (LGPO) – The UCD91320 allows any GPIO to be configured as an LPGO (Up to 16 LGPOs are supported). The states of these pins are dependent on the states of items such as rail status, or fault events.

The device provides additional features such as cascading, pin-selected states, system watchdog, system reset, run time clock, reset counter, and so forth. Cascading feature offers convenient ways to cascade up to four UCD91320 devices and manage up to 128 voltage rails. Pin-selected states feature allows users to define up to 8 rail states. These states can implement system low-power modes as set out in the Advanced Configuration and Power Interface (ACPI) specification.