SLVSIB0 December   2025 UCD91320

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Linearity Parameters
    7. 5.7 POR and BOR
    8. 5.8 Low Frequency Crystal/Clock
    9. 5.9 Flash Memory Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 TI Sequencer Studio Software
      2. 6.2.2 PMBUS Interface
      3. 6.2.3 PMBUS Security
    3. 6.3 Device Functional Modes
      1. 6.3.1 Black Box Fault Logging
      2. 6.3.2 PMBus Address Selection
      3. 6.3.3 Brownout
    4.     Failure Analysis and Returns
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

7.2 Typical Application

Figure 7-1 shows a simplified system diagram. For simplification, this diagram shows only three rails, but each UCD91320 device can manage up to 32 rails.

UCD91320 Simplified System Diagram Figure 7-1 Simplified System Diagram