SLVSLK0 May   2026 TPSI8830

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Configurable Fault Response Timer (TMR)
        1. 8.3.1.1 Fault Latch-OFF
        2. 8.3.1.2 Fault Auto-Retry
      2. 8.3.2 Over-Current Protection (OCP)
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Zero-Cross Turn On
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Thermostat
      2. 9.2.2 System Level Testing
      3. 9.2.3 Design Requirements
      4. 9.2.4 Detailed Design Procedure
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 EMI Considerations
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

9.3 Power Supply Recommendations

To establish a reliable supply voltage, TI recommends placing a minimum of 100nF ceramic capacitor between the VDD pin and the GND pin of the TPSI8830. Place the capacitor as close a manufacturing rules allow to the VDD pin of the device. An additional system capacitance of 1µF or more on the VDD rail is also recommended.