The default configuration of the NVM transitions the PMICs to the ACTIVE state when the ENABLE pin on the TPS6594141B goes high (rising edge triggered). The nINT pin goes high to indicate to the MCU that interrupts have occurred in the PMICs. After a normal power up sequence the interrupts are the ENABLE_INT and BIST_PASS_INT. The ENABLE_INT prohibits the PMICs from processing any lower priority triggers below the 'ON Request' in Table 6-1. Once the ENABLE_INT is cleared the state is defined by Table 7-2. The following sections describe the I²C commands for transitioning between the different states.