The TPS6594-Q1 is an integrated power-management device for automotive and industrial applications. The device provides four flexible multi-phase configurable step-down converters with 3.5 A per phase, and one additional step-down converted with 2 A capability. All of the bucks can be synchronized to an internal 2.2 MHz or 4.4 MHz or an external 1 MHz, 2 MHz, or 4 MHz clock signal. To improve EMC performance of the device, an integrated spread-spectrum modulation can be added to the synchronized buck switching clock signal, which can also be made available to external devices through a GPIO output pin. The device provides four LDOs; three with 500 mA capability which can be configured as load switches, one with 300 mA capability and low-noise performance.
Non-volatile memory (NVM) is used to control the default power sequences, as well as default configurations such as output voltage and GPIO configurations. The NVM is factory-programmed to allow start-up without external programming. Most static settings can be changed from the default through SPI or I2C registers to configure the device to meet many different system needs. As a safety feature, the NVM contains a bit-integrity-error detection feature to stop the power-up sequence if an error is detected, preventing the system from starting in an unknown state.
The TPS6594-Q1 includes a 32 kHz crystal oscillator, which generates the accurate 32 kHz clock for the integrated RTC module. A backup-battery management provides power to the crystal oscillator and the RTC module from a coin cell battery or a super-cap in the event of power loss from the main supply.
The TPS6594-Q1 device includes a Q&A watchdog to monitor for software lockup, and 2 system error monitoring inputs with fault injection options to monitor the error signals from the attached SoC or MCU. The device also includes protection and diagnostic mechanisms such as short-circuit protection, thermal monitoring and shutdown. The PMIC can notify the processor of these events through the interrupt handler, allowing the processor to take action in response.