SLVUCA1 November   2021 TPS7H1210-SEP

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Features
    2. 1.2 Applications
  3. 2Setup
    1. 2.1 Input/Output Connectors and Jumper Descriptions
      1. 2.1.1 J1, J4 (–)VIN
      2. 2.1.2 J6 GND
      3. 2.1.3 J2, J5 (–)VOUT
      4. 2.1.4 J7 GND
      5. 2.1.5 J3 EN
      6. 2.1.6 TP1-5 Test Points
    2. 2.2 Equipment Setup
  4. 3Operation
  5. 4Adjustable Operation
  6. 5Test Results
    1. 5.1 Enable, Disable, and Soft Start Timing
    2. 5.2 Output Load Transients
    3. 5.3 PSRR
    4. 5.4 Noise Spectral Density
  7. 6Board Layout
  8. 7Schematic and Bill of Materials

1 Introduction

The TPS7H1210-SEP negative voltage linear regulator is a low noise, high PSRR (power supply rejection ratio) regulator capable of sourcing a maximum load of 1 A.

The EVM is configured with a default feedback divider network to regulate to a –5-V VOUT, with a usable VIN range of (–5 V – VDO) to –16.5 V. Worst case VDO is 500 mV across recommended operating conditions. The EVM is intended to aid engineers in the evaluation of the operation and performance of the TPS7H1210-SEP linear regulator. The TPS7H1210-SEP low-dropout regulator allows input voltages from –3 V to –16.5 V and is capable of regulating any output voltage between –1.18 V and –15.5 V by changing the feedback resistor divider network. The EVM is capable of delivering up to 1 A to a load. Achieving the maximum load depends on multiple variables, including the input-output power dissipation, board thermal dissipation, and heat removal.