SLVUCP8A September   2024  – June 2025 TPS26750

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Setup
      1. 2.2.1 Flashing Firmware Configuration to the TPS26750EVM
      2. 2.2.2 Stand Alone Testing
      3. 2.2.3 Dead Battery Safe Mode
      4. 2.2.4 Dead Battery Always Enable Sink
      5. 2.2.5 TPS26750 and BQ25756
    3. 2.3 Header Information
    4. 2.4 Jumper Information
    5. 2.5 Push Buttons
    6. 2.6 Interfaces
    7. 2.7 Debug Information
    8. 2.8 Test Points and LEDS
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
      1. 3.2.1 Web Browser
      2. 3.2.2 Native Application
    3. 3.3 Software Development
    4. 3.4 Using the Application Customization Tool
      1. 3.4.1 Default View
      2. 3.4.2 Selecting a Configuration
      3. 3.4.3 Filling Out the Questionnaire
      4. 3.4.4 Advanced Configuration Mode
      5. 3.4.5 Flashing Configuration to TPS26750
      6. 3.4.6 Additional Settings
        1. 3.4.6.1 Generating a New Configuration
        2. 3.4.6.2 Exporting and Importing Settings
        3. 3.4.6.3 Generating the Binary
        4. 3.4.6.4 Generating the VIF File
  10. 4Application Specific Use Cases
    1. 4.1 Use With the BQ25756EVM
      1. 4.1.1 Hardware Setup with BQ25756EVM
      2. 4.1.2 Software Setup with the BQ25756EVM
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
    2. 6.2 Electrostatic Discharge Caution
    3. 6.3 Terminology
    4. 6.4 Device Support
      1. 6.4.1 Third-Party Products Disclaimer
      2. 6.4.2 Supplemental Content
    5. 6.5 Documentation Support
    6. 6.6 Receiving Notification of Documentation Updates
    7. 6.7 Support Resources
  13. 7Revision History

2.3 Header Information

The J2 and J5 headers are setup for ease of use with 5V and 10V level logic analyzers. The most pertinent signals and power rails for testing the TPS26750 are pulled out to these headers. If utilizing the Liquid Detection feature, note that pins SBU1 and SBU2 on Header J5 are not the SBU signals directly at the DUT Type-C connecter (J4), but are instead the SBU signals from the Liquid Detection circuit to the SBUx pins of the TPD4S480, as shown in Figure 5-2.

Table 2-1 J2 Header
PinName
1GPIO5
2GPIO6
3GPIO4
4GPIO7
5GPIO3
6GPIO11
7GND
8GND
9EPR_EN (GPIO2)
10I2Cc_IRQ
11GPIO1
12I2Ct_SDA
13FLT (GPIO0)
14I2Ct_SCL
15PP_EN (Buffered POWER_PATH_EN output)
16I2Ct_IRQ
Table 2-2 J5 Header
PinDescription
1I2Cc_SDA
2I2Cc_SCL
3ADCIN2
4ADCIN1
5SBU2
6SBU1
7GND
8GND
9CC2
10CC1
11LDO_3V3
12VIN_3V3
13PP5V
14HV_SYS_D10 (HV_SYS divided by 10)
15VBUS_D10 (VBUS divided by 10)
16PPHV__D10 (PPHV divided by 10)
17VBUS_LV_D10 (VBUS_LV divide by 10)
18No Connect
19GND
20GND
Note: The label _D10 indicates the signal is divided by 10. For example, when VBUS is at 48V, VBUS_D10 measures approximately 4.8V.