SLVUD73 April   2025 TPS7H3014-SEP , TPS7H3014-SP

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Alternate Board Configurations
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Power Requirements
    2. 2.2 Important Usage Notes
    3. 2.3 Connector Descriptions
  7. 3Implementation Results
    1. 3.1 Default Configuration Results
    2. 3.2 Sequence UP and DOWN Thresholds
    3. 3.3 Delay Timer
    4. 3.4 Regulation Timer
    5. 3.5 Disabled Channels
    6. 3.6 Externally Induced System RESET
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials (BOM)
  9. 5Compliance Information
    1. 5.1 Compliance and Certifications
  10. 6Related Documentation

Delay Timer

The shunt and resistor used on the DLY_TMR pin set the delay time that occurs between when the condition for an ENx signal to transition HIGH or LOW is met and when the ENx signal transitions.

TPS7H3014EVM Sequence UP, 23ms DelayFigure 3-3 Sequence UP, 23ms Delay
TPS7H3014EVM Sequence DOWN, 23ms DelayFigure 3-4 Sequence DOWN, 23ms Delay
TPS7H3014EVM Sequence UP, 12ms DelayFigure 3-5 Sequence UP, 12ms Delay
TPS7H3014EVM Sequence DOWN, 12ms DelayFigure 3-6 Sequence DOWN, 12ms Delay
TPS7H3014EVM Sequence UP, DLY_TMR FloatingFigure 3-7 Sequence UP, DLY_TMR Floating
TPS7H3014EVM Sequence DOWN, DLY_TMR FloatingFigure 3-8 Sequence DOWN, DLY_TMR Floating