SLWU086C November   2013  – January 2016 ADS42JB46 , ADS42JB49 , ADS42JB69 , DAC38J84

 

  1.   TSW14J56 JESD204B High-Speed Data Capture and Pattern Generator Card User's Guide
    1.     Trademarks
    2. 1 Functionality
      1. 1.1 ADC EVM Data Capture
      2. 1.2 DAC EVM Pattern Generator
    3. 2 Hardware Configuration
      1. 2.1 Power Connections
      2. 2.2 Switches, Jumpers, and LEDs
        1. 2.2.1 Switches and Pushbuttons
        2. 2.2.2 Jumpers
      3. 2.3 LEDs
        1. 2.3.1 Power and Configuration LEDs
        2. 2.3.2 Status LEDs
        3. 2.3.3 Connectors
          1. 2.3.3.1 SMA Connectors
          2. 2.3.3.2 FPGA Mezzanine Card (FMC) Connector
          3. 2.3.3.3 JTAG Connectors
          4. 2.3.3.4 USB I/O Connection
    4. 3 Software Start-Up
      1. 3.1 Installation Instructions
      2. 3.2 USB Interface and Drivers
    5. 4 Downloading Firmware
  2.   Revision History

2.3.1 Power and Configuration LEDs

Several LEDs are on the TSW14J56 EVM to indicate the presence of power and the state of the FPGA. The description of these LEDs can be found in Table 3.

Table 3. Power and Configuration LED Description of the TSW14J56 Device

Component Description
D17 On if DDR3 VREF power is good
D10 On if 5V board power is present
D32 On if power monitor device indicates that a power net is out of tolerance
D11 On if +1.0 V is within specification
D13 On if VCCD_1.5 V is within specification
D16 On if VCC_1.5 V is within specification
D21 On if VCC_2.5 V is within specification
D23 On if VCCA_GXB_3.0 V is within specification
D25 On if VCC_PLL_2.5 V is within specification
D26 On if VCC_0.85V is within specification
D27 On if VCCDDR_1.5 V is within specification
D30 On if VTTDDR_0.75 V is within specification
D34 On if VAR power is present
D33 On if USB_1.2 V is within specification
D28 On after FPGA completes configuration