To confirm the conclusions from the simulation results, a load board was designed with multiple routing schemes. This load board fans out a clock output from the onboard LVCMOS oscillator to loads with both the split-line and star-line topologies with different trace lengths. The load board contains the following trace routing configurations:

1. 2" Single trace with 1 via
2. 2" Single trace with 2 vias
3. 1" Single trace with no via
4. 2" Single trace with no via
5. 2" Trace fanned out to 2 loads, split near driver (split-line topology)
6. 2" Trace fanned out to 2 loads, split near load (star-line topology)
7. 2" Trace fanned out to 3 loads, split near driver (split-line topology)
8. 2" Trace fanned out to 3 loads, split near load (star-line topology)
9. 1.5" Trace fanned out to 3 loads, split near load (star-line topology)
10. 1.6" Trace fanned out to 4 loads, split near load (star-line topology)

A picture of the load board design along with coupon boards to add additional trace length is shown in Figure 4-1:

Figure 4-1 Oscillator Multi-Load Fanout Board

The layer stackup of the load board matches the simulation load board shown in Figure 1-1.