SNAS856A September   2024  – March 2025 REF80

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Thermal Information
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Heater
      2. 7.3.2 Buried Zener Reference
  9. 8 Parameter Measurement Information
    1. 8.1 Long-Term Stability
    2. 8.2 Temperature Drift
    3. 8.3 Thermal Hysteresis
    4. 8.4 Noise Performance
      1. 8.4.1 1/f Noise
      2. 8.4.2 Broadband Noise
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical Application: Basic Voltage Reference Connection
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Typical Application Circuits
        1. 9.2.2.1 Precision Voltage Divider Connection
        2. 9.2.2.2 Calibration Signal
    3. 9.3 Power Supply Recommendation
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

9.4.1 Layout Guidelines

Section 9.4.2 illustrates an example of a PCB layout (two layer routing) for a data acquisition system using the REF80. Some key considerations are:
  • Noise performance
    • Connect low-ESR, 0.1μF ceramic bypass capacitors at VDD, HEATM and HEATP of the REF80.
    • Connect 10uF to 100uF class 1 capacitor at REF_Z of the REF80.
    • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary.
  • Thermal performance
    • The layout must minimize the heat dissipation to maintain good thermal resistance for REF80.
    • Use minimum copper to route VDD, REF_Z, REF_GND signal.
    • Use copper as per current requirement for HEATP and HEATM pin.
    • Avoid direct copper pours underneath the package.
    • A shield around the device is recommended to achieve best heater regulation.
  • Seebeck effect
    • Avoid multiple metal-metal junction to minimize Seebeck effect.
  • Long term stability performance
    • Provide strain relief directly to pins as shown in the Layout Example.
    • Provide cuts near to the pin, perpendicular to the pins and corners.
    • Avoid single point strain accumulation.