SNIS118I July   1999  – October 2025 LM50 , LM50HV

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: LM50 (LM50B and LM50C)
    6. 6.6 Electrical Characteristics: LM50HV
    7. 6.7 Typical Characteristics (LM50B and LM50C)
    8. 6.8 Typical Characteristics (LM50HV)
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LM50 and LM50HVTransfer Function
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Full-Range Centigrade Temperature Sensor
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Capacitive Bypass and Loads
          2. 8.2.1.2.2 LM50HV Self-heating
        3. 8.2.1.3 Application Curve
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
      3. 8.5.3 Thermal Considerations
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1.      Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
Capacitive Bypass and Loads

The LM50 and LM50HV devices handle capacitive loading very well. Without any special precautions, the LM50 and LM50HV can drive capacitive load up to 1μF. These devices have a nominal 2kΩ output impedance (shown in Functional Block Diagram). The temperature coefficient of the output resistors is approximately 1300ppm/°C. Taking into account this temperature coefficient and the initial tolerance of the resistors, the output impedance of the device does not exceed 4kΩ. In an extremely noisy environment adding filtering can be necessary to minimize noise pickup. TI recommends adding a CBy-pass = 0.1µF capacitor between +VS and GND to bypass the power supply noise voltage, as shown in Figure 8-3. Adding a capacitor (CLoad) from VO to ground can be necessary. A 1µF output capacitor with the 4kΩ output impedance forms a 40Hz low-pass filter. Because the thermal time constant of the LM50 and LM50HV is much slower than the 25ms time constant formed by the RC, the overall response time of the device is not significantly affected. For much larger capacitors, this additional time lag increases the overall response time of the LM50 and LM50HV.

LM50 LM50HV LM50 and LM50HV No Decoupling Required for Capacitive LoadFigure 8-2 LM50 and LM50HV No Decoupling Required for Capacitive Load
LM50 LM50HV LM50 and LM50HV With Filter for Noisy EnvironmentFigure 8-3 LM50 and LM50HV With Filter for Noisy Environment

To avoid glitch of start-up power supply (input) response especially when CBy-pass is not used (as shown in Figure 6-20, Figure 8-4 and Figure 8-5) on LM50 (new chip) and LM50HV devices, a minimum CLoad must be placed between VO and ground especially when LM50 (new chip) and LM50HV devices are utilized in the comparator circuits.

LM50 LM50HV Start-up response to +VS = 3.3V
            Step (When tr = 1μs, No CLoad and CBy-pass)Figure 8-4 Start-up response to +VS = 3.3V Step (When tr = 1μs, No CLoad and CBy-pass)
LM50 LM50HV Start-up Response to +VS = 36V Step
            (When tr = 1μs, No CLoad and CBy-pass)Figure 8-5 Start-up Response to +VS = 36V Step (When tr = 1μs, No CLoad and CBy-pass)

The minimum CLoad capacitor is varied over different operating temperature range and power supply ramp rate as shown in the Table 8-2. Please noted that the rise time (tr) can be translated to ramp rate of power supply (SR) by: SR (V/μs) = 0.8 × +VS (V) / tr (μs).

Table 8-2 Minimum Required CLoad to Avoid Glitch Overshoot Over Power Supply Start-up Step Response (without CBy-pass)

Load Capacitance

+VS = 3.3V+VS = 5V+VS = 36V
tr = 0.1μstr = 1μstr = 0.1μstr = 1μstr = 0.1μstr = 1μs
CLoad (min)
at TA = -40°C
0.33nF0.33nF0.47nF0.47nF10nF10nF
CLoad (min)
at TA = 25°C
0.02nFNA0.05nF0.05nF0.68nF0.68nF
CLoad (min)
at TA = 150°C
NANANANA0.12nF0.12nF

Figure 8-6 and Figure 8-7 show start-up step response to 3.3V and 36V power supply with around 3.3V/μs ramp rate (without using CBy-pass). Each figure shows the output response to no load and minimum required CLoad when glitch overshoot is eliminated. The worst-case scenario (as shown in Table 8-2) is happened when operating temperature is -40°C.

LM50 LM50HV Start-up Response to +VS = 3.3V
            Step Without CBy-pass When SR = 3.3V/μs (With No CLoad and
              CLoad = 0.33nF)Figure 8-6 Start-up Response to +VS = 3.3V Step Without CBy-pass When SR = 3.3V/μs (With No CLoad and CLoad = 0.33nF)
LM50 LM50HV Start-up Response to +VS = 36V Step
            Without CBy-pass When SR = 3.3V/μs (With No CLoad and
              CLoad = 10nF)Figure 8-7 Start-up Response to +VS = 36V Step Without CBy-pass When SR = 3.3V/μs (With No CLoad and CLoad = 10nF)

Note: TI suggests adding a minimum 0.1µF CBy-pass (between +VS and GND) and/or a 0.1µF CLoad (between VO and GND) capacitors to avoid supply noise and glitch overshoot.