SNVA991 October   2022 LM5123-Q1

 

  1.   How to Design a Boost Converter Using LM5123
  2.   Trademarks
  3. 1Design Example
  4. 2Calculations and Component Selection
    1. 2.1  Switching Frequency
    2. 2.2  Initial Inductor Calculation
    3. 2.3  Current Sense Resistor Selection
    4. 2.4  Inductor Selection
    5. 2.5  Output Capacitor Selection
    6. 2.6  Input Capacitor Selection
    7. 2.7  Feedback Resistor Selection
    8. 2.8  UVLO Resistor Selection
    9. 2.9  Soft-Start Capacitor Selection
    10. 2.10 Control Loop Compensation
      1. 2.10.1 Crossover Frequency (fcross) Selection
      2. 2.10.2 RCOMP Selection
      3. 2.10.3 CCOMP Selection
      4. 2.10.4 CHF Selection
    11. 2.11 MOSFET selection
  5. 3Implementation Results
  6. 4Small Signal Frequency Modeling
    1. 4.1 Boost Regulator Modulator Modeling
    2. 4.2 Compensation Modeling
    3. 4.3 Open Loop Modeling
  7. 5Resources

2.2 Initial Inductor Calculation

The inductance value of the boost regulator is calculated with respect to the inductor current ripple ratio (RR). The ripple ratio is defined as the peak to peak ripple current over the average inductor current. In a boost topology the average inductor current is equal to the average input current. There are three main considerations guiding the selection of the inductance value: the inductor power loss, the falling slope of the inductor current and the right-half plane (RHP) zero frequency (ωZ_RHP) of the control loop.

  • As the inductance value increases the ripple ratio decreases so does inductor core loss and the RMS current but the losses due to the DCR of the inductor increase. Inductor selection effects the power losses of the regulator and should be considered to optimize the efficiency of the design.
  • The inductance value should be large enough to prevent the sub-harmonic oscillation when they duty cycle is greater than approximately 50%. The LM5123 implements a fixed internal slope compensation of 45 mV referenced to the current sense amplifier input. Additional slope compensation is required in peak current mode control architectures to prevent sub-harmonic oscillation.
  • The RHP zero frequency is a limiting factor for the maximum control loop bandwidth. Therefore, the RHP zero frequency should be high enough to maximize the crossover frequency of the control loop. As the relative inductance value decreases the RHP zero frequency increases. Note, decreasing the inductance value increases the ripple ratio. As the relative control loop bandwidth increases the required output capacitance for a given load step reduces.

A maximum ripple ratio between 30% and 60% yields a balanced compromise among the above considerations. In this example, the maximum ripple ratio of the inductor current is selected to be 60%. The ripple ratio is calculated at the maximum output voltage (VLOADmax) and maximum output power (POUTmax) to properly select the inductance value. In continuous conduction mode the duty cycle is estimated using Equation 2. The ripple ratio is calculated using Equation 3.

Equation 2. D=1-VSUPPLYVLOAD
Equation 3. RR= VSUPPLY2∙DILOAD∙LM∙VLOAD∙fSW

where

  • VSUPPLY is the voltage supplied to the input of the power stage
  • VLOAD is the target voltage regulation
  • ILOAD is the output current
  • LM is the magnetizing inductance of the inductor
  • fSW is the switching frequency

Locating the operating point at which the maximum ripple ratio is dependent on the duty cycle range. In CCM operation the maximum ripple ratio typically occurs at 33% duty cycle. When the duty cycle at the maximum input voltage is greater than 33% the maximum ripple ratio occurs at VSUPPLYmax. When the duty cycle at the minimum input voltage is less than 33% the maximum ripple ratio occurs at VSUPPLYmin.

Figure 2-2 Ripple Ratio vs VSUPPLY

Leveraging Equation 2, the duty cycle at the maximum input voltage is calculated to be 48.6% when the output voltage is set to VLOADmax. The maximum ripple ratio occurs when VSUPPLY is at the maximum specified value. If the design operates at 33% duty, Equation 4 is used to back calculate the supply voltage at given duty cycle.

Equation 4. VSUPPLY_ΔILmax=VLOAD∙(1-DΔILmax)

where

  • DΔILmax is equal to 33%

For this design example VSUPPLY_ΔILmax is equal to 18 V. Knowing maximum ripple ratio operating point, the desired ripple ratio, load current and the switching frequency, the inductance is calculated using Equation 5

Equation 5. LM_calc=VSUPPLY2∙DILOAD∙RR∙VLOAD∙fSW=18V2∙0.4865.71A∙0.6∙35V∙440kHz=2.98 µH

A standard inductance of 2.6 µH is selected to satisfy the design criteria.

The maximum peak inductor current occurs at the minimum supply voltage, VSUPPLY_min, and the maximum load current ILOADmax. The peak inductor current is the sum of the average input current and half of the inductor peak-peak ripple, and is calculated using Equation 6.

Equation 6. I L P E A K m a x = V L O A D ∙ I L O A D V S U P P L Y + 1 2 ∙ V S U P P L Y ∙ D L M ∙ f S W =   35 V ∙ 5.71 A 8 V + 1 2 ∙ 8 V ∙ 0.771 2.6 µ H ∙ 440 k H z = 27.67 A