SNVSCQ8B November   2025  – July 2026 LM654A5-Q1 , LM654B0-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1  Output Voltage Selection
      2. 7.3.2  EN Pin and Use as VIN UVLO
      3. 7.3.3  Device Configuration
      4. 7.3.4  Mode Selection
        1. 7.3.4.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.4.2 Clock Locking
      5. 7.3.5  Adjustable Switching Frequency and Phase Shift
      6. 7.3.6  Dual Random Spread Spectrum (DRSS)
      7. 7.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 7.3.8  Bootstrap Voltage (BST Pin)
      9. 7.3.9  Soft Start and Recovery From Dropout
      10. 7.3.10 Safety Features
        1. 7.3.10.1 Power-Good Monitor
        2. 7.3.10.2 Overcurrent and Short-Circuit Protection
        3. 7.3.10.3 Hiccup
        4. 7.3.10.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Example Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitors
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Setting the Output Voltage
        6. 8.2.2.6 Compensation Components
        7. 8.2.2.7 Feed-forward Capacitor (CFF)
        8. 8.2.2.8 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.2.2.3 Output Capacitors

  1. Use Equation 10 to estimate the output capacitance required to manage the output voltage overshoot during a load-off transient (from full load to no load) assuming a load transient deviation specification of 3.5% (170mV for a 5V output).
    Equation 10. C O U T = ∆ I O U T 2 × L O V O U T + ∆ V O V E R S H O O T 2 - V O U T 2 =   20 A 2 × 0 . 33 μ H 5 V + 0.170 V 2 - 5 V 2 = 76 μ F
  2. Noting the voltage coefficient of ceramic capacitors where the effective capacitance decreases significantly with applied voltage, select two 47µF, 10V, X7S, 1210 ceramic output capacitors. Generally, when sufficient capacitance is used to satisfy the load-off transient response requirement, the voltage undershoot during a no-load to full-load transient is also satisfactory. For this example, choosing two TDK 47µF CGA6P1X7S1A476M250AC gives an effective capacitance of 80µF for a 5V output.
  3. Use Equation 11 to estimate the peak-peak output voltage ripple at nominal input voltage.
    Equation 11. ∆ V o u t   =   ( ∆ I L O 8 × C O U T × F S W ) 2 + ( R E S R × ∆ I L O ) 2 =   ( 5.2 A 8 × 80 μ F × 2100 k H z ) 2 + ( 1 m Ω × 5.2 A ) 2 =   6.4 m V
    Equation 12. ∆ I L O = V I N - M A X - V O U T × V O U T V I N - M A X × f S W × L

    where

    • ΔILO is the desired peak-to-peak ripple inductor current. For this example, a 20A rated device with K = 0.3 yields an inductor ripple current of 5.2A.
    • RESR is the effective equivalent series resistance (ESR) of the output capacitors.
    • 80µF is the total effective (derated) ceramic output capacitance at 5V.
  4. Use Equation 13 to calculate the output capacitor RMS ripple current using and verify that the ripple current is within the capacitor ripple current rating.
    Equation 13. I C O ( r m s ) ≅ 0.29 × ∆ I L O = 1.5 A