SNVSCQ8B November   2025  – July 2026 LM654A5-Q1 , LM654B0-Q1

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Descriptions
      1. 7.3.1  Output Voltage Selection
      2. 7.3.2  EN Pin and Use as VIN UVLO
      3. 7.3.3  Device Configuration
      4. 7.3.4  Mode Selection
        1. 7.3.4.1 MODE/SYNC Pin Uses for Synchronization
        2. 7.3.4.2 Clock Locking
      5. 7.3.5  Adjustable Switching Frequency and Phase Shift
      6. 7.3.6  Dual Random Spread Spectrum (DRSS)
      7. 7.3.7  Internal LDO, VCC UVLO, and BIAS Input
      8. 7.3.8  Bootstrap Voltage (BST Pin)
      9. 7.3.9  Soft Start and Recovery From Dropout
      10. 7.3.10 Safety Features
        1. 7.3.10.1 Power-Good Monitor
        2. 7.3.10.2 Overcurrent and Short-Circuit Protection
        3. 7.3.10.3 Hiccup
        4. 7.3.10.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
        1. 7.4.2.1 Peak Current Mode Operation
        2. 7.4.2.2 Auto Mode Operation
          1. 7.4.2.2.1 Diode Emulation
        3. 7.4.2.3 FPWM Mode Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Example Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Choosing the Switching Frequency
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitors
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Setting the Output Voltage
        6. 8.2.2.6 Compensation Components
        7. 8.2.2.7 Feed-forward Capacitor (CFF)
        8. 8.2.2.8 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.2.3 FPWM Mode Operation

Like auto mode operation, FPWM mode operation during light-load operation is selected using the SYNC/MODE pin.

In FPWM Mode, frequency is maintained while lightly loaded. To maintain frequency, a limited reverse current is allowed to flow through the inductor. Reverse current is limited by reverse current limit circuitry. See the Electrical Characteristics for reverse current limit values.

LM654A5-Q1 LM654B0-Q1 FPWM Mode Operation
FPWM mode Continuous Conduction (CCM) is possible even if IOUT is less than half of Iripple.
Figure 7-12 FPWM Mode Operation

In FPWM mode, frequency reduction is still available if the input voltage is high enough to command minimum on-time. This frequency reduction allows good behavior during line faults to avoid the output voltage being pulled up.