SPRACU1A October 2020 – June 2021 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6441 , AM6442
Unlike DDR3 and DDR4, there is no required termination on the PCB of the address/control bus of an LPDDR4 configuration. All termination is handled internally (on-die). Thus, VTT does not apply for LPDDR4.