SPRADT7 July   2026 AWR2188

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AWR2188+FPDLINK+AGX ORIN System Detailed Description
    1. 2.1 System Architecture
      1. 2.1.1 Hardware Components
      2. 2.1.2 Data Flow Pipeline
      3. 2.1.3 Orin Platform Software Stack
    2. 2.2 AWR2188 Radar Configuration
    3. 2.3 FPD-Link SerDes Configuration
    4. 2.4 NVIDIA Orin Platform Configuration Example
      1. 2.4.1 L4T Version and Setup
      2. 2.4.2 Device Tree Configuration
      3. 2.4.3 Kernel Driver Modifications
      4. 2.4.4 Configuration Verification
    5. 2.5 Complete System Validation Example
      1. 2.5.1 Software and Hardware Boot Sequence
      2. 2.5.2 SerDes Link Verification
      3. 2.5.3 V4L2 Capture Test
    6. 2.6 Troubleshooting Recommendations During System Operation
      1. 2.6.1 No Video Device After Orin Boot
      2. 2.6.2 SerDes Link Check Reports Errors
      3. 2.6.3 V4L2 Capture Shows No Data
  6. 3Summary
  7. 4References

2.1.1 Hardware Components

The complete system consists of four primary hardware components:

  1. AWR2188 Satellite Board – Contains the TI 76–81GHz radar MMIC (integrating transmit and receive chains) and the UB971 serializer. Please refer to the TI website for this reference design.
  2. UB9702 Deserializer Evaluation Board – TI FPD-Link IV SerDes for high-speed CSI-2 data transmission. Please refer to the TI website for this reference design.
  3. NVIDIA Jetson AGX Orin 64G Developer Kit – Processing platform running Linux for Tegra (L4T) R36.4.4.
  4. UB9702-to-Orin Adapter Board – Custom interface board connecting the deserializer output to the Orin CSI ports. As interface definitions may vary across Orin revisions, users may define and fabricate their own adapter boards.

The hardware reference connection is shown below: