SPRUIW7A October 2020 – February 2022
Common Processor board audio ports are mapped as below.
McASP0 and McASP1 of J7200 SoC is muxed with UART and MCAN interface. J7200 SOM includes two 1:3 De-Mux (Mfr. Part# SN74CBTLV16292GR) to support Audio codec and Trace functions on the CP Board and MCAN/LIN on the J7x GESI Expansion board. Default channel selection will be done for McASP/TRACE interface through Resistor strap and GPIO from GPIO expander on the J7200 SoC will change the configuration.
AUDIO_EXT_REF_CLK1 of J7200 SoC is used for System Reference clock input of the Audio codec. 4bit 1:2 mux IC is used to route the clock input to the McASP/MCAN mux as shown in Figure 4-30.
MUX_SEL2 | MUX_SEL1 | MUX_SEL0 | FUNCTION |
---|---|---|---|
HIGH | HIGH | LOW | A port0 = B1 port |
HIGH | HIGH | HIGH | A port0 = B2 port (default) |
HIGH | LOW | HIGH | A port0 = B3 port |
Port B1: McASP0/1 and TRACE
Port B2: MCAN/UART
Port B3: PROFI_UART/SPI