SPRUJ81A February   2023  – January 2025 AM62A1-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
  4. 2 Width/Spacing Proposal for Escapes
  5. 3 Stackup
  6. 4 Via Sharing
  7. 5 Floorplan Component Placement
  8. 6 Critical Interfaces Impact Placement
  9. 7 Routing Priority
  10. 8 SerDes Interfaces
  11. 9 DDR Interfaces
  12. 10Power Decoupling
  13. 11Route Lowest Priority Interfaces Last
  14. 12Summary
  15. 13References
  16. 14Revision History

5 Floorplan Component Placement

Careful analysis is required to analyze the locations of the interfaces used on the device and the associated components and connectors. Optimum trace routing has routes as short as possible with a minimum cross-over. The AM62Ax/AM62Dx offers interface selection flexibility through pin-mux choices. Pin-muxing enables the same interface function made available on multiple pins and is selectable through a pin mux option. Favorable pin-mux options that ease PCB routing and component placement can be fully utilized to further optimize the PCB design. The figure below shows the arrangement of the signal balls and the power and ground balls. Priority is given to component placements without pin-mux options, such as DDR, CSI, USB, and so forth.

AM62Ax/AM62Dx Floorplan Figure 5-1 AM62Ax/AM62Dx Floorplan