SPRUJ81A February   2023  – January 2025 AM62A1-Q1 , AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1 , AM62D-Q1

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
  4. 2 Width/Spacing Proposal for Escapes
  5. 3 Stackup
  6. 4 Via Sharing
  7. 5 Floorplan Component Placement
  8. 6 Critical Interfaces Impact Placement
  9. 7 Routing Priority
  10. 8 SerDes Interfaces
  11. 9 DDR Interfaces
  12. 10Power Decoupling
  13. 11Route Lowest Priority Interfaces Last
  14. 12Summary
  15. 13References
  16. 14Revision History

11 Route Lowest Priority Interfaces Last

When the length matching and simulations for high speed interfaces and DDR have been completed for the highest priority interfaces and the Power Distribution Network (PDN) analysis has been completed, then the layout can continue with the medium and then the lower priority interfaces.