SPRUJA3 November   2024 F29H850TU , F29H859TU-Q1 , TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28378D , TMS320F28379D

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between F2837x, F2838x, F28P65x and F29H85x
    1. 1.1 F28x to F29x Feature Change Overview
  5. 2C29x Architecture
    1. 2.1 C29x Architecture Overview
      1. 2.1.1 Peripheral Interrupt Priority and Expansion (PIPE)
      2. 2.1.2 Safety and Security Module (SSU)
      3. 2.1.3 Real-Time DMA (RTDMA)
      4. 2.1.4 Lock-step Compare Module (LCM)
    2. 2.2 C28x vs C29x Architecture Overview
  6. 3PCB Design Consideration
    1. 3.1 VSSOSC
    2. 3.2 JTAG
    3. 3.3 VREF
  7. 4Feature Differences for System Consideration
    1. 4.1 New Features in F29H85x
      1. 4.1.1  Analog Subsystem
      2. 4.1.2  Data Logger and Trace (DLT)
      3. 4.1.3  Single Edge Nibble Transmission (SENT)
      4. 4.1.4  Waveform Analyzer Diagnostic (WADI)
      5. 4.1.5  EPWM
      6. 4.1.6  Bootrom
      7. 4.1.7  ERAD
      8. 4.1.8  XBAR
      9. 4.1.9  Error Signaling Module (ESM)
      10. 4.1.10 Error Aggregator
      11. 4.1.11 Hardware Security Module (HSM)
        1. 4.1.11.1 Cryptographic Accelerators
      12. 4.1.12 Safe Interconnect End-to-End (E2E) Safing
      13. 4.1.13 Critical MMR Safing With Parity
      14. 4.1.14 LPOST
    2. 4.2 Communication Module Changes
    3. 4.3 Control Module Changes
    4. 4.4 Analog Module Differences
    5. 4.5 Power Management
      1. 4.5.1 VREGENZ
      2. 4.5.2 Power Consumption
    6. 4.6 Memory Module Changes
    7. 4.7 GPIO Multiplexing Changes
  8. 5Software Development with F29H85x
    1. 5.1 Migration Report Generation Tool
  9. 6References

4.4 Analog Module Differences

This section outlines the analog differences between F28P65x and F29H85x. The ADC on F29H85x has a lot of new features compared to the ADC on F28P65x. Table 4-6 shows the differences.

Table 4-6 Analog Module Differences
Module Category F28P65x F29H85x Notes
ADC Number 3 - ADCA to ADCC 5 - ADCA to ADCE
Registers - PPBTRIP1FILCLKCTL ADCEVT1 Trip High Filter Prescale Control
- PPBTRIP1FILCTL ADCEVT1 Trip High Filter Control Register
- PPBTRIP2FILCLKCTL ADCEVT2 Trip High Filter Prescale Control
- PPBTRIP2FILCTL ADCEVT2 Trip High Filter Control Register
- PPBTRIP3FILCLKCTL ADCEVT3 Trip High Filter Prescale Control
- PPBTRIP3FILCTL ADCEVT3 Trip High Filter Control Register
- PPBTRIP4FILCLKCTL ADCEVT4 Trip High Filter Prescale Control
- PPBTRIP4FILCTL ADCEVT4 Trip High Filter Control Register
- RESULT16 ADC Result 16 Register
- RESULT17 ADC Result 17 Register
- RESULT18 ADC Result 18 Register
- RESULT19 ADC Result 19 Register
- RESULT20 ADC Result 20 Register
- RESULT21 ADC Result 21 Register
- RESULT22 ADC Result 22 Register
- RESULT23 ADC Result 23 Register
- RESULT24 ADC Result 24 Register
- RESULT25 ADC Result 25 Register
- RESULT26 ADC Result 26 Register
- RESULT27 ADC Result 27 Register
- RESULT28 ADC Result 28 Register
- RESULT29 ADC Result 29 Register
- RESULT30 ADC Result 30 Register
- RESULT31 ADC Result 31 Register
- SAFECHECKRESEN2 ADC Safe Check Result Enable 2 Register
- SOC16CTL ADC SOC16 Control Register
- SOC17CTL ADC SOC17 Control Register
- SOC18CTL ADC SOC18 Control Register
- SOC19CTL ADC SOC19 Control Register
- SOC20CTL ADC SOC20 Control Register
- SOC21CTL ADC SOC21 Control Register
- SOC22CTL ADC SOC22 Control Register
- SOC23CTL ADC SOC23 Control Register
- SOC24CTL ADC SOC24 Control Register
- SOC25CTL ADC SOC25 Control Register
- SOC26CTL ADC SOC26 Control Register
- SOC27CTL ADC SOC27 Control Register
- SOC28CTL ADC SOC28 Control Register
- SOC29CTL ADC SOC29 Control Register
- SOC30CTL ADC SOC30 Control Register
- SOC31CTL ADC SOC31 Control Register
Analog Subsystem Register - AGPIOCTRLH AGPIO Control Register
- CTLTRIMSTS HWCTL TRIM Error Status register
- CTLTRIMSTSCLR HWCTL TRIM Error Status CLEAR register
- INTERNALTESTCTL INTERNALTEST Node Control Register
- IODRVSEL 5V FS IO Drive strength select register
- IOMODESEL PMBUS IO Mode select register
- PARITY_TEST Enables parity test
- PARITY_TEST_ALT1 Enables parity test
- PMMVREGTRIM Power Management Module VREG Trim Register
- REFBUFCONFIGCDE Config register for analog reference CDE
- VREGCTL Voltage Regulator Control Register
ADCACLOOPBACK - Enable loopback from DAC to ADCs
AGPIOCTRLG - AGPIO Control Register
GPIOINENACTRL - GPIOINENACTRL Control Register
DAC Number 2 - GPDACA, GPDACC
CMPSS Number 11 - CMPSS1 to CMPSS11 12 - CMPSS1 to CMPSS12
Temp Sensor Number 1 - (in ADCB ch 18) 1