SPRUJE4D August   2024  – June 2025 F29H850TU , F29H859TU-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Quick Start Setup
      1. 2.1.1 Configuration 1: Stand-alone Configuration
      2. 2.1.2 Configuration 2: C2000 controlCARD Compatibility Configuration Using HSEC180ADAPEVM
      3. 2.1.3 Configuration 3: Baseboard Configuration
    2. 2.2  Design Details
      1. 2.2.1 Power Tree
      2. 2.2.2 Clocking
      3. 2.2.3 Reset
      4. 2.2.4 Board ID EEPROM
    3. 2.3  Power Requirements
    4. 2.4  Configuration Options
      1. 2.4.1 Boot Mode Selection
      2. 2.4.2 ADC Voltage Reference Selection
      3. 2.4.3 MCAN-A Boot Support
      4. 2.4.4 FSI DLT Support
      5. 2.4.5 EtherCAT PHY Clock Selection
    5. 2.5  Header Information
      1. 2.5.1 Baseboard Headers (J1, J2, J3)
      2. 2.5.2 XDS Debug Header (J4)
      3. 2.5.3 DLT Header (J5)
    6. 2.6  Push Buttons
    7. 2.7  User LEDs
    8. 2.8  Debug Information
    9. 2.9  Test Points
    10. 2.10 Best Practices
  8. 3Software
    1. 3.1 Software Description
    2. 3.2 Software Installation
      1. 3.2.1 Install SDK
      2. 3.2.2 Install Additional Software
        1. 3.2.2.1 Install Python
        2. 3.2.2.2 Install OpenSSL
    3. 3.3 Software Development
    4. 3.4 Developing an Application
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
      1. 5.1.1 Usage Note Matrix
      2. 5.1.2 Advisories Matrix
      3. 5.1.3 Usage Notes
        1. 5.1.3.1 Parallel I/O Boot Can Cause Watchdog Timer Timeout if No Host Is Connected to EVM
        2. 5.1.3.2 Device GPIOs Dedicated to PMIC SPI Bus Should Be Used for SPI Function If Used On Baseboard
      4. 5.1.4 Advisories
        1. 5.1.4.1  MCU Flash Is Not Supported, All Code Must Execute From RAM
        2. 5.1.4.2  Incorrect Package Marking on MCU Package
        3. 5.1.4.3  Internal Oscillator (INTOSC2) on MCU Defaults to 6MHz
        4. 5.1.4.4  By Default, GPIO4 Configured as ERRORSTS by ROM Code and Driven High
        5. 5.1.4.5  MCU Fault State Possible When On-Board 25MHz Clock is Enabled
        6. 5.1.4.6  25MHz X1 Clock Is Disabled, INTOSC Must Be Used as MCU Clock Source and EtherCAT Is Not Supported
        7. 5.1.4.7  PMIC Monitoring of MCU Reset Signal (XRSN) Is Disabled
        8. 5.1.4.8  ADC VREFHIAB and VREFHICDE Incorrectly Shorted Together When S3 and S4 Are Both Set to Internal VREF Mode
        9. 5.1.4.9  Incorrect Voltage on VREFHIAB and VREFHICDE Pins When External VREF Mode Is Selected
        10. 5.1.4.10 MCU Reset Signal (XRSN) Can Remain Asserted on Power-On
        11. 5.1.4.11 FSI Signals on the Data Logging and Trace Connector (J5) May Interfere With Some Advanced Debuggers
    2. 5.2 Trademarks
  11. 6References
  12. 7Revision History

2.1.1 Configuration 1: Stand-alone Configuration

The stand-alone configuration can be used for most software development use cases that do not require the controlSOM to interface to other hardware. An XDS110 debug-probe (XDS110ISO-EVM) is required for this configuration. Power is provided to the controlSOM through XDS110 debug-probe. The XDS110 debug-probe is sold separately.

In this configuration, Code Composer Studio™ IDE connects to the controlSOM using JTAG and enables software development. The XDS110 debug-probe also enumerates a virtual COM port (VCP) for communication with the MCU using UART.

Follow these steps to enable this configuration:

  1. Collect the required equipment:
    1. F29H85x controlSOM (F29H85X-SOM-EVM)
    2. XDS110 isolated debug probe (XDS110ISO-EVM)
    3. 1 USB Type-C® cable (3 meters or less)
  2. Verify the switch settings are correct on each EVM.
    1. F29H85X-SOM-EVM:
      1. Use S1 to select the desired boot mode.
      2. Use S3/S4 to select the desired ADC voltage reference mode.
    2. XDS110ISO-EVM: No switch configuration is necessary.
  3. Connect the XDS110ISO-EVM to connector J1 of the controlSOM.
  4. Connect the USB cable into connector J5 on the XDS110 isolated debug probe. The XDS110 isolated probe and the controlSOM are powered on.
  5. Verify the power status LEDs (LED1 and LED2) on the controlSOM are turned on.
  6. The controlSOM is ready for use. Follow the steps in the Software section to get started developing software.
F29H85X-SOM-EVM Stand-alone Configuration Figure 2-1 Stand-alone Configuration

In the stand-alone configuration, the 12-pin prototype header (J2) on the XDS110ISO-EVM provides access a few ADC and GPIO pins on the F29H85x device. Table 2-1 lists the ADC and GPIO pins that can be accessed on this prototype header.

Table 2-1 XDS110ISO-EVM Prototype Header (J2) Pinout
MCU Signal SOM Standard Pin Pin SOM Standard MCU Signal
GND GND 12 11 GND GND
GPIO5 J1.5 10 9 J1.11 GPIO2
GPIO4 J1.7 8 7 J1.13 GPIO1
GPIO3 J1.9 6 5 J1.15 GPIO0
A7/E25/GPIO225/CMP9P/CMP2N J1.118 4 3 J1.117

A1/C25/CMP7P/CMP4N
A6/E24/GPIO224/CMP2P/CMP12N J1.120 2 1 J1.119 A0/DACOUT1/C24/CMP4P/CMP9P