SWAU132A April   2024  – August 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Regulatory Compliance
      1. 1.3.1 Waste Electrical and Electronic Equipment (WEEE)
    4. 1.4 Specification
    5. 1.5 Device Information
  6. 2Hardware
    1. 2.1 Hardware Features
    2. 2.2 Connector and Jumper Descriptions
      1. 2.2.1 LED Indicators
      2. 2.2.2 Jumper Settings
      3. 2.2.3 BoosterPack Header Assignment
      4. 2.2.4 JTAG Headers
    3. 2.3 Power
      1. 2.3.1 Measure the CC3351 Current Draw
        1. 2.3.1.1 Low Current Measurement (LPDS)
        2. 2.3.1.2 Active Current Measurement
    4. 2.4 Clocking
    5. 2.5 Performing Conducted Testing
  7. 3Implementation Results
    1. 3.1 Evaluation Setups
      1. 3.1.1 MCU and RTOS
      2. 3.1.2 Processor and Linux
      3. 3.1.3 Standalone RF Testing
        1. 3.1.3.1 Radio Tool BP-CC3351 Hardware Setup
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Support Resources
    2. 5.2 Trademarks
  10. 6Revision History

2.4 Clocking

The BP-CC3351 provides two clock inputs to the CC3351 device:

  • Y1 is a 40MHz crystal for fast clock input.
  • Y2 is a 32.768kHz oscillator for slow clock input.

If the user desires to provide the own external slow clock through the Slow Clock Input pin (P2.19), then some re-work must be performed. The Y2 oscillator needs to be removed, and populate a 0201-sized, 0-ohm resistor on the R29 pad. See Figure 2-8. The slow clock can also be generated internally to save on BOM.

BP-CC3351 BP-CC3351 Clock CircuitryFigure 2-8 BP-CC3351 Clock Circuitry