SWRA667 January 2020 CC1312PSIP , CC1312R , CC1314R10 , CC1352P , CC1352P7 , CC1352R , CC2642R , CC2642R-Q1 , CC2652P , CC2652R , CC2652R7 , CC2652RB , CC2652RSIP
The AES and hash crypto accelerator is responsible for AES (see Reference [3]) and SHA-2 (see Reference [4]) functionality. It supports numerous AES block cipher modes of operation and all SHA-2 output digest sizes. It also has its own integrated DMA that can concurrently stream in input and out output. As a result, the drivers generally set up the crypto accelerator, start it, and then wait for the accelerator to complete the entire operation without further intervention.
The time required to process an additional block of input data is relatively small compared to the overhead of setting up the accelerator. It is therefore beneficial from an energy consumption perspective to perform fewer longer operations rather than multiple shorter ones when using drivers based on the AES and hash crypto accelerator.
Because of the trade-off between marginal energy cost per input block and setup overhead, there is a message length where an AES or SHA2 operation consumes less total energy using blocking return behavior than polling return behavior despite having a longer duration.
Driver | Polling Recommended Interval
(bytes) |
Blocking or Callback Recommended Interval
(bytes) |
---|---|---|
AES ECB | < 1350 | ≥ 1350 |
AES CBC | < 1350 | ≥ 1350 |
AES CTR | < 1350 | ≥ 1350 |
AES CCM | < 675 | ≥ 675 |
AES GCM | < 1475 | ≥ 1475 |
AES CTR DRBG | < 1350 | ≥ 1350 |
SHA-224 | < 4650 | ≥ 4650 |
SHA-256 | < 4650 | ≥ 4650 |
SHA-384 | < 7100 | ≥ 7100 |
SHA-512 | < 7100 | ≥ 7100 |
See for further benchmarking data of the cryptographic accelerators in Table 3 when using drivers with polling vs. blocking return behavior.