SWRA825 January 2025 IWR6843 , LP87745-Q1
Diagnostics is an important aspect to consider in the context of safety. TI mmWave device include hardware and firmware elements to enable diagnostics of its analog and digital sections. These built-in features are exposed to users through firmware APIs. It helps users to build their software to program and use these APIs to achieve their end-product’s safety goals. A Safety Diagnostic Library (SDL) is provided to access these inbuilt Diagnostic and Monitoring features.
In functional mode, the ESPE shall respond by giving appropriate output signal(s) when part of a person greater than or equal to the detection capability (as specified in the relevant part of IEC 61496) enters or is in the detection zone.
In diagnostics mode the IWR6843 is using the diagnostics functions for testing the signal chains. The OSSDs stay in the same state as in previous sensing mode during diagnostics mode. Figure 3-12 shows two options for the scheduling of the diagnostics activity.
Figure 3-12 Diagnostics SchedulingIn addition to the diagnostics and monitoring functions the IWR6843 can also be put into loopback mode. When no functional chirps are ongoing, the BSS can schedule loopback test data (I1) collection. Processed input data I1 is then compared against input I2 (lookup table in memory) from the R4F lockstep Core (see Figure 3-13).
Figure 3-13 Conceptual Block Diagram for
Cat 2 ArchitectureTo ensure that the power supply output power rails are within the desired voltage range, voltage supervision of the power is needed, the Figure 3-14 shows how this is implemented using external voltage supervisors and a Q&A watchdog which is integrated in the PMIC. This Q&A watchdog is needed to monitor the function of the IWR6843. The 1.0V rail can be measured and monitored with the internal ADC as this rail is independent and used only for the Power Amplifier, Low Noise Amplifier and Mixers.
For this concept the selected PMIC is the LP87745 and the optional voltage supervisors are the TPS3703. It is worth mentioning that all of those devices have a safety manual and additional safety documentation.
The MSS processor communicates through messages with the DSS (see Figure 3-14). The MSS running the main software application updates the Q&A watchdog timer via SPI to the LP87745.
The nERROR signal is also checked from the PMIC. If the software cycle is too long or if an nERROR signal occurs, the LP87745 triggers the PMIC_nINT signal that puts the outputs into a safe state.
Figure 3-14 Power Supply and External Test
Equipment (TE)