SWRS337B December   2025  – June 2026 CC3551E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Diagram
    2. 5.2 Pin Attributes
    3. 5.3 Signal Descriptions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Electrical Characteristics
    5. 6.5  Thermal Resistance Characteristics
    6. 6.6  WLAN Performance: 2.4-GHz Receiver Characteristics
    7. 6.7  WLAN Performance: 2.4-GHz Transmitter Power
    8. 6.8  WLAN Performance: 5-GHz Receiver Characteristics
    9. 6.9  WLAN Performance: 5-GHz Transmitter Power
    10. 6.10 Bluetooth LE Performance: Receiver Characteristics
    11. 6.11 Bluetooth LE Performance - Transmitter Characteristics
    12. 6.12 Current Consumption - 2.4GHz WLAN Static Modes 
    13. 6.13 Current Consumption - 5GHz WLAN Static Modes
    14. 6.14 Current Consumption - 2.4GHz WLAN Use Cases
    15. 6.15 Current Consumption - Bluetooth LE Static Modes 
    16. 6.16 Current Consumption - MCU Modes
    17. 6.17 Timing and Switching Characteristics
      1. 6.17.1 Clock Specifications
        1. 6.17.1.1 Fast Clock Using an External Crystal (XTAL)
          1. 6.17.1.1.1 External Fast Clock XTAL Specifications
        2. 6.17.1.2 Slow Clock Using Internal Oscillator
        3. 6.17.1.3 Slow Clock Using an External Oscialltor
          1. 6.17.1.3.1 External Slow Clock Oscillator Specifications
        4. 6.17.1.4 Slow Clock Using an External Crystal (XTAL)
          1. 6.17.1.4.1 External Slow Clock XTAL Specifications
      2. 6.17.2 Peripheral Characteristics
        1. 6.17.2.1  ADC
          1. 6.17.2.1.1 ADC Electrical Specifications
        2. 6.17.2.2  I2C
          1. 6.17.2.2.1 I2C Timing Parameters
          2. 6.17.2.2.2 I2C Timing Diagram
        3. 6.17.2.3  SPI
          1. 6.17.2.3.1 SPI Timing Parameters - Controller Mode
          2. 6.17.2.3.2 SPI Timing Diagrams - Controller Mode
          3. 6.17.2.3.3 SPI Timing Parameters - Peripheral Mode
          4. 6.17.2.3.4 SPI Timing Diagrams - Peripheral Mode
        4. 6.17.2.4  xSPI
          1. 6.17.2.4.1 QSPI Timing Parameters
        5. 6.17.2.5  UART
          1. 6.17.2.5.1 UART Timing Parameters
        6. 6.17.2.6  I2S
          1. 6.17.2.6.1 I2S Timing Parameters - Controller Mode
          2. 6.17.2.6.2 I2S Timing Parameters - Peripheral Mode
        7. 6.17.2.7  PDM
          1. 6.17.2.7.1 PDM Timing Parameters
        8. 6.17.2.8  CAN
          1. 6.17.2.8.1 CAN Characteristics
        9. 6.17.2.9  SDMMC
          1. 6.17.2.9.1 SDMMC Timing Parameters - Default Speed 
          2. 6.17.2.9.2 SDMMC Timing Parameters - High Speed 
        10. 6.17.2.10 SDIO
          1. 6.17.2.10.1 SDIO Timing Parameters - Default Speed 
          2. 6.17.2.10.2 SDIO Default Timing
          3. 6.17.2.10.3 SDIO Timing Parameters - High Speed 
          4. 6.17.2.10.4 SDIO High Speed Timing
  8. 7 Detailed Description
    1. 7.1  Overview
    2. 7.2  Arm Cortex-M33 Processor
    3. 7.3  Wireless Subsystem
      1. 7.3.1 WLAN
      2. 7.3.2 Bluetooth Low Energy
    4. 7.4  Memory Subsystem (MEMSS)
      1. 7.4.1 External Memory Interface
    5. 7.5  Hardware Security Module
    6. 7.6  Debug Subsystem (DEBUGSS)
    7. 7.7  General Purpose Timers
    8. 7.8  Real Time Clock (RTC)
    9. 7.9  Direct Memory Access (DMA)
    10. 7.10 Serial Peripherals and I/Os
  9. 8 Applications, Implementation, and Layout
  10. 9 Device and Documentation Support
    1. 9.1 Third-Party Products Disclaimer
    2. 9.2 Device Nomenclature
    3. 9.3 Tools and Software
    4. 9.4 Documentation Support
    5. 9.5 Support Resources
    6. 9.6 Trademarks
    7. 9.7 Electrostatic Discharge Caution
    8. 9.8 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.2 Arm Cortex-M33 Processor

The CC35xx SimpleLink Wireless MCU contains an Arm Cortex-M33 system CPU, which runs the application, the protocol stacks, and the wireless subsystem. The Cortex-M33 processor is a high performance, low gate count, highly configurable, and energy efficient processor. It is intended for microcontroller and embedded applications that require an efficient mix of control capability and signal processing instructions. The processor is based on the Armv8‑M architecture and is primarily for use in environments where security is an important consideration.

The following features are included:

  • 160 MHz Operation
  • Arm TrustZone technology, using the Armv8‑M Security Extension supporting Secure and Nonsecure states
  • The Floating-point Extension (FPU)
  • The Digital Signal Processing (DSP) Extension
  • Enhanced system debug with up to 4 watchpoints and 8 breakpoints
  • The Memory Protection Unit Extension (MPU)
  • Programmable Security Attribution Unit (SAU)
  • Micro Trace Buffer (MTB)
  • Wakeup interrupt controller (WIC)
  • Arm Custom Instructions (ACI)
  • The Instruction Trace Macrocell Extension (ITM)
  • A Nested Vectored Interrupt Controller (NVIC) that is closely integrated with the processor
  • A low-cost debug solution with the ability to implement breakpoints, watchpoints, tracing
  • Passing on-chip data through a Trace Port Interface Unit (TPIU) to a Trace Port Analyzer (TPA) using Serial Wire Output (SWO) mode
  • A ROM table to allow debuggers to determine which components are implemented in the Cortex-M33 processor
  • In-order pipeline processor
  • Incorporates the Thumb-2 technology
  • Data accesses in little endian
  • Harvard architecture characterized by separate buses for instruction and data
  • Saturating arithmetic and dedicated hardware division
  • Standard trace support
    • ITM
    • TPIU with asynchronous serial wire output (SWO)
    • Full debug with data matching for watchpoint generation
    • DWT
    • SWD (Serial Wire Debug) port