TIDT408A December 2024 – May 2025
The following images are primary switching node and synchronous rectifier gate waveforms.
CH1: Vpri_ds, CH2: SR_Gate
Figure 3-11 115VAC, Vds_pri, VSR_gate,
20V, Full Load
Figure 3-13 90VAC, Full Load, Vds_pri,
Vbus Valley 83V
Figure 3-12 230VAC, Vds_pri, VSR_gate,
20V, Full LoadThe following images are 230VAC input ACDC switching node waveforms at different load conditions.
Figure 3-14 230VAC, 20V, 3.25A, fsw =
125KHz
Figure 3-16 230VAC, 20V, 50% Load,
1.6A, fsw = 128KHz
Figure 3-18 230VAC, 10% Load 0.32A,
fsw = 39KHz
Figure 3-20 230VAC, 20V, Open Load,
Vds_pri
Figure 3-15 230VAC, 20V, 75% Load,
2.45A, fsw = 133KHz
Figure 3-17 230VAC, 20V, 25% Load
0.82A, fsw = 94KHz
Figure 3-19 230VAC, 20V, 200mW Load,
Vds_priThe following images are 115VAC input ACDC switching node waveforms at different load conditions.
Figure 3-21 115VAC, 20V, 3.25A Full
Load, Vds_pri, fsw = 118KHz
Figure 3-23 115VAC, 20V, 1.8A 50%
Load, Vds_pri, fsw = 120KHz
Figure 3-25 115VAC, 20V, 0.32A 10%
Load, Vds_pri, fsw = 42KHz
Figure 3-27 115VAC, 20V, Open Load,
Vds_pri, 3 Consecutive Switching Cycle to Achieve First Valley
Switching
Figure 3-22 115VAC, 20V, 2.45A 75%
Load, Vds_pri, fsw = 127KHz
Figure 3-24 115VAC, 20V, 0.82A 25%
Load, Vds_pri, fsw = 107KHz
Figure 3-26 115VAC, 20V, 200mW Load,
Vds_pri