TIDUF26 june   2023 BQ24072 , LMR36520 , TLV62568 , TPS2116

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 24 VAC to DC Rectification
      2. 2.2.2 eFuse Protection
      3. 2.2.3 5-V Rails
        1. 2.2.3.1 LMR36520 Voltage Rail
        2. 2.2.3.2 USB Power Input
      4. 2.2.4 Power Source ORing
      5. 2.2.5 Battery Management
      6. 2.2.6 3.3-V Power Rail
      7. 2.2.7 Power Rail Current Sensing
      8. 2.2.8 Backlight LED Driver
      9. 2.2.9 BoosterPack Overview
    3. 2.3 Highlighted Products
      1. 2.3.1 LMR36520
      2. 2.3.2 TPS2116
      3. 2.3.3 TLV62568
      4. 2.3.4 INA2180
      5. 2.3.5 TPS92360
      6. 2.3.6 TPS2640
      7. 2.3.7 BQ24072
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results
      1. 3.3.1  24-VAC Start-Up and Shutdown
      2. 3.3.2  USB Start-Up and Shutdown
      3. 3.3.3  ORing
      4. 3.3.4  LMR36520
      5. 3.3.5  TLV62568 Transient Response
      6. 3.3.6  BM24072 Transient Response
      7. 3.3.7  TLV62568 (3V3 Power Rail)
      8. 3.3.8  LMR36520 (LMOut Power Rail)
      9. 3.3.9  BM24072 (BMOut Power Rail)
      10. 3.3.10 Reference
        1. 3.3.10.1 TLV62568
        2. 3.3.10.2 LMR36520
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.3.3 ORing

The ORing circuit as described in Section 2.2.4 is tested in this section. Figure 3-18 shows LMOut dominating USB upon plug in. Prior to LMOut powering up, USB is shown high and LMRC is high, forcing the USBin associated FETs on and LMOut FETs off. Once LMOut is powered up, the LMOnOff node begins to be pulled up, thus driving LMRC low, thereby turning the LM associated FETs on, and the USB associated FETs off. Figure 3-19 shows the opposite activity when LMOut shifts low. When the USB power is not present, the LM still passes through to output by pulling LMOnOff high as shown in Figure 3-20 and Figure 3-21.

GUID-20230607-SS0I-WKVN-LT2N-GWHCK0P3Q5KQ-low.png Figure 3-18 ORing Start-Up (LMOut Power Up: USB Source Present)
GUID-20230607-SS0I-PWR5-436B-CR1BMZGQZJTN-low.png Figure 3-19 ORing Shutdown (LMOut Power Loss: USB Source Present)
GUID-20230607-SS0I-HKG7-PZHK-6P1N4BGS7MRX-low.png Figure 3-20 ORing Start-Up (LMOut Power Up: USB Source Absent)
GUID-20230607-SS0I-GTDL-Q9MS-BNQCXGLFF4VM-low.png Figure 3-21 ORing Shutdown (LMOut Power Loss: USB Source Absent)