TIDUF48C November   2024  – January 2025 THS6222 , THS6232

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 PLC010935BP
      2. 2.2.2 THVD8000DDF
      3. 2.2.3 THS6222RGTT
      4. 2.2.4 MSPM0G350x
      5. 2.2.5 TPS26624DRCR
      6. 2.2.6 LM5164QDDARQ1
      7. 2.2.7 TPS560430X3FDBVR
      8. 2.2.8 TMUX1204DGSR
    3. 2.3 Design Considerations
      1. 2.3.1 Modulator and Carrier Frequency Selection
      2. 2.3.2 Power Consumption and Gain of the THS6222 Line Driver
      3. 2.3.3 Front End and Discrete Filter
      4. 2.3.4 THVD8000 Schematic
      5. 2.3.5 Board Pinout
  9. 3Hardware, Software, Testing Requirements and Test Results
    1. 3.1 Test Setup
      1. 3.1.1 Powering the TIDA-010935
    2. 3.2 Test Results
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author
  12. 6Revision History

2.3.5 Board Pinout

Table 2-5 provides descriptions of the pins.

Table 2-5 Pinout Table
PIN NUMBER PIN NAME DESCRIPTION
1 3.3V 3.3V power supply
3 RX Receiver pin
4 TX Transmitter pin
5 SHDN Shutdown pin, set high to enable the communication
8 MODE Mode pin, set high for enabling transmitting phase, low for receiving phase
11 FLT FLT pin, if set high the device is off, if low the device can work
20 GND Ground connection
22 GND Ground connection
31 FILTER_B1 TMUX pin for filter selection
32 FILTER_B0 TMUX pin for filter selection
33 FSET_B1 Modulation frequency selection pin
34 FSET_B0 Modulation frequency selection pin
35 FILTER_EN Enable pin for activating TMUX and demodulation
39 BIAS_1 Current consumption selection pin
40 BIAS_2 Current consumption selection pin