TIDUFC2 Design guide

TIDUFC2 April 2025

2.2.1 High-Voltage Generator Circuit

Figure 2-2 shows the high-voltage topology. This topology generates the ±80V and ±40V power supply from the 12V bus power supply to power TX7516 through a SEPIC and Cuk circuit. This section mainly introduces SEPIC circuit design procedures (±80V power rail) and key device selection.

TIDA-010256 High-Voltage Power Supply Topology

Figure 2-2 High-Voltage Power Supply Topology

Table 2-1 High-Voltage Power Supply Formulas

PARAMETERS	FORMULA	RESULT
Duty Cycle	$D_{m a x} = \frac{V_{o u t} + V_{d}}{V_{i n m i n} + V_{o u t} + V_{d}}$	87.3% where V_d ≅ 0.7V V_inmin = 11.7V
Switch Frequency	According to the maximum duty cycle vs frequency graph of the LM5155x 2.2MHz Wide Input Nonsynchronous Boost, SEPIC, Flyback Controller data sheet, the switching frequency can be as low as 100kHz.	150kHz, 100kHz
Inductor	$L 1 = L 2 = L 3 = \frac{V_{i n m i n} \times V_{i n m a x} \times D_{m a x}}{2 \times I_{o u t} \times V_{o u t} \times 0.4 \times f_{S W}} = 42.55 μ H. n = 0.88$ $I ({L 1}_{p e a k}) = \frac{I_{o u t} \times (V_{o u t} + V_{d}) \times (1 + \frac{0.4}{2})}{V_{i n m i n} \times n} = 2.81 A$ $I ({L 2}_{p e a k}) = I_{o u t} \times (1 + \frac{0.4}{2}) = 0.36 A$	L1 = 47μH, DCR = 0.0459Ω, and I_sat = 3.8AL2 = 47μH, DCR = 0.095Ω, and I_sat = 1.45A
Power MOSFET Q1	$V_{p e a k} = V_{i n} + V_{o u t} + V_{d} = 12 + 100 + 0.7 = 112.7 V$ $I_{Q 1 R M S} = I_{o u t} \times \sqrt{\frac{(V_{o u t} + V_{m i n} + V_{d}) \times (V_{o u t} + V_{d})}{{V_{i n m i n}}^{2}}} = 2.21 A$ $P_{Q 1} = {I_{Q 1 R M S}}^{2} \times R_{D S (o n)} \times D_{m a x} + (V_{i n m i n} + V_{o u t}) \times I_{Q 1 p e a k} \times \frac{Q_{G D} \times f_{s w}}{I_{G}} = 0.249 W$	FDMC86240 150V, 4.6A MOSFET T_J(MAX) = 150℃ > T_J where R_DS(on) = 0.0447Ω Q_GD= 2.3nC I_G = 1.5A T_J= P_Q1 × R_θJA + T_A = 0.249 × 53 + 25 = 38.197°C
Diode D1, D2	$V_{r e v e r s e} \geq V_{i n m a x} + V_{o u t m a x} = 92 V$ $I_{p e a k} \geq I_{L 1 p e a k} + I_{L 2 p e a k} = 3.17 A$ $P_{d} = I_{o u t} \times V_{d} = 0.21 W$	MBRS4201T3G Schottky, 200V, 4A where V_d = 0.7V
Coupling Capacitor Cs1, Cs2	$I_{c p r m s m a x} = I_{o u t} \times \sqrt{\frac{V_{o u t} + V_{d}}{V_{i n m i n}}} = 0.788 A$ If target ripple in C_s < 0.8V, then according to the following equations: $∆_{c p} \leq \frac{I_{o u t} \times D_{m a x}}{C_{s} \times f_{S W}} + E S R \times m a x (I l 1 p e a k, I l 2 p e a k)$ $C_{s} m u s t b e \geq \frac{I_{o u t} \times D_{m a x}}{∆_{c p} \times f_{S W}} = 2.182 μ F$ $E S R \leq \frac{∆_{c p}}{m a x (I l 1 p e a k, I l 2 p e a k)} = 285 m Ω$	C_s1 = C_s2 = 2.2μF
Output Capacitor	$I_{c o u t, R M S} = I_{o u t} \times \sqrt{\frac{D_{m a x}}{1 - D_{m a x}}} = 0.787 A$ If target ripple in C_out < V_out × 1%, then according to the following equations: $C_{o u t} m u s t b e \geq \frac{I_{o u t} \times D_{m a x}}{∆_{c o u t} \times f_{S W}} = 2.18 μ F$ $E S R \leq \frac{∆_{c o u t}}{I l 1 p e a k + I l 2 p e a k} = 252 m Ω$	18122C105JAT2A × 2 200V
Input Capacitor	$C_{i n m i n} = \frac{\frac{P_{o u t}}{V_{s u p p l y m i n}} \times (1 - D)}{∆_{V s u p p l y} \times f_{S W}} = 6.95 μ F$	10μF, 25Vdc where Δ_Vsupply = 0.25V
Compensation	R_FBB = 11kΩ, R_FBT = 618kΩ $F_{R H P Z} = \frac{{(1 - D_{m a x})}^{2} \times V_{o u t}}{2 π D_{m a x} \times L_{2} \times 0.5 \times I_{o u t}} = 33.37 k H z$ $F_{R} = \frac{1}{2 π \sqrt{L_{2} \times C_{s}}} = 15.651 k H z$ $F_{c r o s s} = \frac{F_{R}}{6} = 2.608 k H z$ $R_{c o m p} = \frac{2 π \times C_{o u t} \times R_{s} \times {V_{o u t}}^{2} \times F_{c r o s s} \times (1 + D m a x)}{G_{c o m p} \times g_{m} \times V_{i n m i n} \times D m a x} = \frac{2 \times π \times 2.2 \times 10^{- 6} \times 0.01 \times 80 \times 80 \times 2608 \times 1.873}{0.142 \times \frac{2 m A}{V} \times 11.7 \times 0.873} = 1.49 k Ω$ $F_{Z_E A} = \sqrt{F_{c r o s s} \times \frac{1}{π \times C_{o u t} \times \frac{V_{o u t}}{I_{o u t}}}} = 1189.55 H z$ $C_{c o m p} = \sqrt{\frac{C_{o u t} \times \frac{V_{o u t}}{I_{o u t}}}{4 π R_{c o m p}^{2} \times F_{c r o s s}}} = 89.79 n F$ $C_{H F} = \frac{C_{c o m p} \times L_{2}}{C_{c o m p} \times {(1 - D m a x)}^{2} \times \frac{V o u t}{I o u t} \times R_{c o m p} - L 2} = 7.39 n F$	R18 = 1.5kΩ C26 = 100nF C25 = 6.8nF R_s = 10mΩ

TIDA-010256 80V High-Voltage Power Supply Schematic

Figure 2-3 80V High-Voltage Power Supply Schematic

The ±40V high-voltage output channel calculation is also referenced from the table. In addition, for more convenient regulation of the output voltage, a 10-bit DAC53401 is used to control the positive voltage feedback loop of the SEPIC. Figure 2-4 shows the DAC trim circuit for a ±80V output channel.

TIDA-010256 DACx3401 Power Supply Control

Figure 2-4 DACx3401 Power Supply Control

The DAC53401 features a Hi-Z power-down mode that is set by default at power-up, unless the device is programmed otherwise using the non-volatile memory. When the digital-to-analog converter (DAC) output is at Hi-Z, the current through R3 is zero and SEPIC is set to the nominal output voltage, also to avoid no current flowing through R3 during power up of the DAC. Use Equation 1 to calculate the value of R3 assuming a current limit of 10μA.

Equation 1.

R_{3} = \frac{|V_{D A C m a x} - V_{F B}|}{I_{s e t}} = \frac{\frac{1000}{1024} \times 1.21 \times 3 - 1}{10 μ A} = 25.45 k

where

DAC code is limited to 1000
Internal reference = 1.21V
Gain = 3
R3 select 27kΩ

Based on Equation 2, assuming the output code of the DAC is 0 when R_B is 11kΩ, R_T can be calculated as 618kΩ. When the DAC code is 1024, the calculated output voltage becomes negative; therefore, restrict the maximum value of DAC code to 924, which yields an output voltage of approximately 5.09V.

Equation 2.

\begin{matrix} V_{O U T} = (1 + \frac{R_{T}}{R_{B}} + \frac{R_{T}}{R_{3}}) \times V_{r e f} - \frac{R_{T}}{R_{3}} \times \frac{C o d e}{1024} \times V_{D A C r e f} \times G a i n \end{matrix}