TIDUFC2 April   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 High-Voltage Generator Circuit
      2. 2.2.2 Low-Voltage Switching Mode Power Supply
      3. 2.2.3 Sitara™ MCU AM2431 Reset and Power Rail Monitoring Circuit
      4. 2.2.4 Clock Generator
      5. 2.2.5 CMOS to LVDS Driver
      6. 2.2.6 Layout Guidance
    3. 2.3 Highlighted Products
      1. 2.3.1 TX7516
      2. 2.3.2 TMU9832
      3. 2.3.3 AM2431
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
      1. 3.1.1 TIDA-010256 PCB Overview
      2. 3.1.2 TIDA-010256 Connector Settings
    2. 3.2 Software Requirements
    3. 3.3 Test Setup
    4. 3.4 Test Results
      1. 3.4.1 High-Voltage Power Supply Output Ripple
      2. 3.4.2 Output Waveform
      3. 3.4.3 Thermal Test
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks

Output Waveform

Table 3-3, Table 3-4, and Table 3-5 show part of the register configuration for TX7516 in CW-mode, B-mode, and elastography mode. Since the pulser input substations are identical for each TMUX9832, all channels of the first TMUX9832 are turned on for testing, measured at TMUX9832 output, and load resistance is 220Ω|220pF.

Table 3-3 CW Mode Register Configuration
BF_CLK BF_CLK_DIV CLK_DIV HVB PERIOD CW OUTPUT FREQUENCY
200MHz 2 2 50 1MHz
Table 3-4 B-Mode Pattern Memory Configuration
ADDR BYTE 4 BYTE 3 BYTE 2 BYTE 1
0x40 0xCA

Level = 010(HVP_B),

Period = 25

0xC8

Level = 000(GND),

Period = 25

0x01

LOCAL_REP_NUM = 1

0x00

GBL_REP_NUM = 0

0x41 0x00 0xC8

Level = 000(GND),

Period = 25

0xCA

Level = 010(HVP_B),

Period = 25

0xc9

Level = 001(HVP_A),

Period = 25

0x42 0x00 0x00 0x00 0xff
Table 3-5 Elastography Mode Pattern Memory Configuration
ADDR BYTE 4 BYTE 3 BYTE 2 BYTE 1
0x40 0x55

Level = 101(AVDDM_HV_A),

Period = 10

0x51

Level = 001(AVDDP_HV_A),

Period = 10

0x63

LOCAL_REP_NUM = 99

0x13

GBL_REP_NUM = 19

0x41 0x00 0x00 0xff 0x00

Figure 3-6 through Figure 3-9 show the waveforms for CW mode, B-mode, and elastography mode.


TIDA-010256 CW Mode Waveform

Figure 3-6 CW Mode Waveform

TIDA-010256 Elastography Mode Waveform

Figure 3-8 Elastography Mode Waveform

TIDA-010256 B-Mode Waveform

Figure 3-7 B-Mode Waveform

TIDA-010256 Elastography Mode
                            Waveform(Zoomed In)

Figure 3-9 Elastography Mode Waveform
(Zoomed In)