TIDUFE2 October   2025

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Fault Detection and Protection
      2. 2.2.2 Theory of Operation - Parallel LDOs Using Op Amps
      3. 2.2.3 Theory of Operation - Parallel LDOs Using Ballast Resistors
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS7B7702-Q1, Automotive, Dual-Channel Antenna Low Dropout (LDO) Regulator With Current Sense
      2. 2.3.2 OPAx388 Automotive, Precision, Zero-Drift, Zero-Crossover, True Rail-to-Rail, Input/Output Operational Amplifiers
      3. 2.3.3 LMV321A-Q1 Automotive Low-Voltage Rail-to-Rail Output Operational Amplifier
  9. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
    3. 3.3 Test Results - Parallel LDOs Using Op Amps
      1. 3.3.1 Short to Battery
      2. 3.3.2 Load Transient Response
      3. 3.3.3 Current Limit
      4. 3.3.4 Start-Up
      5. 3.3.5 Shutdown
      6. 3.3.6 Line Transient
      7. 3.3.7 PSRR
      8. 3.3.8 Thermal Performance
      9. 3.3.9 Thermal Limit Protection
    4. 3.4 Test Results - Parallel LDOs Using Ballast Resistors
      1. 3.4.1 Short to Battery
      2. 3.4.2 Load Transient Response
      3. 3.4.3 Current Limit
      4. 3.4.4 Start-Up
      5. 3.4.5 Line Transient
      6. 3.4.6 Thermal Performance
      7. 3.4.7 Thermal Limit Protection
    5. 3.5 Comparison of Results Between Parallel LDO Techniques
      1. 3.5.1 VLOAD vs ILOAD
      2. 3.5.2 PSRR
  10. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
      3. 4.1.3 Layout Prints
    2. 4.2 Tools
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  11. 5About the Author

3.4.7 Thermal Limit Protection

The thermal protection performance of the parallel LDO channels exhibits a staircase effect on VLOAD during turn off and turn on as each LDO enters and exits thermal shutdown. Thermal protection is repeatedly engaged until the power dissipation from the parallel LDOs is removed. Figure 3-48 demonstrates the desired effect of the thermal protection circuitry in the presence of heavy power dissipation across the LDOs.

TIDA-050096 2 × LDO Channels (Ballast)
VERR = VERR1, VIN = 21V, IOUT = 600mA
Figure 3-67 2 × LDO Channels (Ballast)