10-Bit, 65-MSPS Analog-to-Digital Converter (ADC)
Product details
Parameters
Package | Pins | Size
Features
- Single +3.0V Operation
- Selectable 2 VP-P, 1.5 VP-P, or 1 VP-P Full-scale Input
- 400 MHz −3 dB Input Bandwidth
- Low Power Consumption
- Standby Mode
- On-Chip Reference and Sample-and-Hold Amplifier
- Offset Binary or Two’s Complement Data Format
- Separate Adjustable Output Driver Supply to Accommodate 2.5V and 3.3V Logic Families
- 28-pin TSSOP Package
Key Specifications
- Resolution 10 Bits
- Conversion Rate 65 MSPS
- Full Power Bandwidth 400 MHz
- DNL ±0.3 LSB (typ)
- SNR (fIN = 11 MHz) 59.6 dB (typ)
- SFDR (fIN = 11 MHz) −80 dB (typ)
- Power Consumption, 65 MHz 68.4 mW
All trademarks are the property of their respective owners.
Description
The ADC10065 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 10-bit digital words at 65 Megasamples per second (MSPS). This converter uses a differential, pipeline architecture with digital error correction and an on-chip sample-and-hold circuit to provide a complete conversion solution, and to minimize power consumption, while providing excellent dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 400 MHz. Operating on a single 3.0V power supply, this device consumes just 68.4 mW at 65 MSPS, including the reference current. The Standby feature reduces power consumption to just 14.1 mW.
The differential inputs provide a full scale selectable input swing of 2.0 VP-P, 1.5 VP-P, 1.0 VP-P, with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. An internal +1.2V precision bandgap reference is used to set the ADC full-scale range, and also allows the user to supply a buffered referenced voltage for those applications requiring increased accuracy. The output data format is user choice of offset binary or two’s complement.
This device is available in the 28-lead TSSOP package and will operate over the industrial temperature range of −40°C to +85°C.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | ADC10065 10-Bit 65 MSPS 3V A/D Converter datasheet (Rev. H) | Apr. 18, 2013 |
Technical article | Keys to quick success using high-speed data converters | Oct. 13, 2020 | |
Technical article | How to achieve fast frequency hopping | Mar. 03, 2019 | |
Technical article | RF sampling: Learning more about latency | Feb. 09, 2017 | |
Technical article | Why phase noise matters in RF sampling converters | Nov. 28, 2016 | |
User guide | ADC10040/65/80 10-Bit, 40/65/80 MSPS, 3 Volt, 55.5/68.5/78.6 mW ADC User Guide | Feb. 20, 2012 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 28 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
TI E2E™ forums with technical support from TI engineers
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.