CD74AC138 3-Line to 8-Line Inverting Decoders/Demultiplexers | TI.com

CD74AC138 (ACTIVE) 3-Line to 8-Line Inverting Decoders/Demultiplexers

3-Line to 8-Line Inverting Decoders/Demultiplexers - CD74AC138
Datasheet
 

Description

The ’AC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications (see Application Information).

Features

  • AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems
  • Incorporate Three Enable Inputs to Simplify Cascading and/or Data Reception
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

Parametrics

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Part number Order Function Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Voltage (Nom) (V) F @ nom voltage (Max) (MHz) ICC @ nom voltage (Max) (mA) tpd @ nom Voltage (Max) (ns) Configuration Type IOL (Max) (mA) IOH (Max) (mA) Rating Operating temperature range (C) Package Group Package size: mm2:W x L (PKG) Bits (#) Digital input leakage (Max) (uA) ESD CDM (kV) ESD HBM (kV)
CD74AC138 Order now Decoder
Demultiplexer    
AC     1.5     5.5     1     1.5
3.3
5    
100     0.08     138
15.4
11    
3:8     Standard     24     -24     Catalog     -55 to 125     PDIP | 16
SOIC | 16    
See datasheet (PDIP)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)    
8     5     0.75     2    
CD54AC138 Samples not available Decoder/Demultiplexer     AC     1.5     5.5     1     1.5
3.3
5    
100     0.08     125
14
10    
3:8     Standard     24/-24       Military     -55 to 125     CDIP | 16     See datasheet (CDIP)     8     5     0.75     2