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Product details

Parameters

Technology Family LS Function BCD Decoder Configuration 4:7 Channels (#) 1 VCC (Min) (V) 4.75 VCC (Max) (V) 5.25 Input type Bipolar Output type Open-Collector Data rate (Max) (Mbps) 70 ICC (Max) (uA) 10000 open-in-new Find other Encoders & decoders

Package | Pins | Size

PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6 SOP (NS) 16 80 mm² 10.2 x 7.8 open-in-new Find other Encoders & decoders

Features

  • '46A, '47A, 'LS47 feature
    • Open-Collector Outputs Drive Indicators Directly
    • Lamp-Test Provision
    • Leading/Trailing Zero Suppression
  • '48, 'LS48 feature
    • Internal Pull-Ups Eliminate Need for External Resistors
    • Lamp-Test Provision
    • Leading/Trailing Zero Suppression
  • 'LS49 feature
    • Open-Collector Outputs
    • Blanking Input
  • All Circuit Types Feature Lamp Intensity Modulation Capability
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Description

The '46A, '47A, and 'LS47 feature active-low outputs designed for driving, common-anode LEDs or incandescent indicators directly. The '48, 'LS48, and 'LS49 feature active-high outputs for driving lamp buffers or common-cathode LEDs. All of the circuits except 'LS49 have full ripple-blanking input/output controls and a lamp test input. The 'LS49 circuit incorporates a direct blanking input. Segment identification and resultant displays are shown below. Display patterns for BCD input counts above 9 are unique symbols to authenticate input conditions.

The '46A, '47A, '48, 'LS47, and 'LS48 circuits incorporate automatic leading and/or trailing-edge zero-blanking control (RBI\ and RBO\). Lamp test (LT\) of these types may be performed at any time when the BI\/RBO\ node is at a high level. All types (including the '49 and 'LS49) contain an overriding blanking input (BI\), which can be used to control the lamp intensity by pulsing or to inhibit the outputs. Inputs and outputs are entirely compatible for use with TTL logic outputs.

The SN54246/SN74246 and '247 and the SN54LS247/SN74LS247 and 'LS248 compose the 6 and the 9 with tails and were designed to offer the designer a choice between two indicator fonts.

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Technical documentation

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Type Title Date
* Datasheet BCD-to-Seven-Segment Decoders/Drivers datasheet Mar. 01, 1988
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Designing with the SN54/74LS123 (Rev. A) Mar. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

CAD/CAE symbols

Package Pins Download
PDIP (N) 16 View options
SO (NS) 16 View options
SOIC (D) 16 View options

Ordering & quality

Information included:
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  • REACH
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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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