Product details

Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 45 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.025 Rating Catalog Drain supply voltage (max) (V) 6 Negative rail supply voltage (max) (V) 0
Configuration 2:1 SPDT Number of channels 3 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Power supply voltage - dual (V) +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 45 CON (typ) (pF) 25 ON-state leakage current (max) (µA) 1 Supply current (typ) (µA) 8 Bandwidth (MHz) 180 Operating temperature range (°C) -55 to 125 Features Break-before-make Input/output continuous current (max) (A) 0.025 Rating Catalog Drain supply voltage (max) (V) 6 Negative rail supply voltage (max) (V) 0
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm) PDIP (N) 16 181.42 mm² (19.3 mm × 9.4 mm) SOP (NS) 16 79.56 mm² (10.2 mm × 7.8 mm)
  • Wide analog input voltage range: ±5V maximum
  • Low ON-resistance:
    • 70Ω typical (VCC – VEE = 4.5V)
    • 40Ω typical (VCC – VEE = 9V)
  • Low crosstalk between switches
  • Fast switching and propagation speeds
  • Break-before-make switching
  • Wide operating temperature range: –40°C to +125°C
  • Operation control voltage: 4.5V to 5.5V
  • Switch voltage: 0V to 10V
  • Direct LSTTL input logic compatibility VIL = 0.8V maximum, VIH = 2V minimum
  • CMOS input compatibility II ≤ 1µA at VOL, VOH
  • Wide analog input voltage range: ±5V maximum
  • Low ON-resistance:
    • 70Ω typical (VCC – VEE = 4.5V)
    • 40Ω typical (VCC – VEE = 9V)
  • Low crosstalk between switches
  • Fast switching and propagation speeds
  • Break-before-make switching
  • Wide operating temperature range: –40°C to +125°C
  • Operation control voltage: 4.5V to 5.5V
  • Switch voltage: 0V to 10V
  • Direct LSTTL input logic compatibility VIL = 0.8V maximum, VIH = 2V minimum
  • CMOS input compatibility II ≤ 1µA at VOL, VOH

The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state.

The CDx4HC405x and CDx4HCT405x device is a digitally controlled analog switch that uses silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

This analog multiplexer and demultiplexer controls analog voltages that may vary across the voltage supply range (for example, VCC to VEE). It is a bidirectional switch that allows any analog input to be used as an output and vice versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet CDx4HC405x, CD4HCT405x High-Speed CMOS Logic Analog Multiplexer and Demultiplexer datasheet (Rev. O) PDF | HTML Jan 21, 2026
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML Jun 2, 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML Dec 1, 2021

Design & development

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Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Supported products & hardware
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Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
PDIP (N) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian

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