5-V, 2:1 (SPDT) 3-channel analog switch
Product details
Parameters
Package | Pins | Size
Features
- Wide Analog Input Voltage Range: ±5-V Maximum
- Low ON-Resistance
- 70-Ω Typical (VCC – VEE = 4.5 V)
- 40-Ω Typical (VCC – VEE = 9 V)
- Low Crosstalk Between Switches
- Fast Switching and Propagation Speeds
- Break-Before-Make Switching
- Wide Operating Temperature Range:
–55°C to +125°C - CD54HC and CD74HC Types
- Operation Control Voltage: 2 V to 6 V
- Switch Voltage: 0 V to 10 V
- CD54HCT and CD74HCT Types
- Operation Control Voltage: 4.5 V to 5.5 V
- Switch Voltage: 0 V to 10 V
- Direct LSTTL Input Logic Compatibility
VIL = 0.8-V Max, VIH = 2-V Min - CMOS Input Compatibility
II ≤ 1 µA at VOL, VOH
- On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
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Description
The CDx4HC405x and CDx4HCT405x devices are digitally controlled analog switches that use silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.
These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range (for example, VCC to VEE). They are bidirectional switches that allow any analog input to be used as an output and vice versa. The switches have low ON resistance and low OFF leakages. In addition, all these devices have an enable control that, when high, disables all switches to their OFF state.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
Features
- Quick testing of TI's leaded surface mount packages
- Allows leaded suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 8 most popular leaded packages with a single panel
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
PDIP (N) | 16 | View options |
SO (NS) | 16 | View options |
SOIC (D) | 16 | View options |
TSSOP (PW) | 16 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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