Product details

Configuration 4:1 Number of channels (#) 2 Power supply voltage - single (V) 5 Protocols Analog Ron (Typ) (Ohms) 40 CON (Typ) (pF) 12 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 185 Operating temperature range (C) -55 to 125 Features Break-before-make Input/output continuous current (Max) (mA) 25 Rating Catalog Supply current (Typ) (uA) 8
Configuration 4:1 Number of channels (#) 2 Power supply voltage - single (V) 5 Protocols Analog Ron (Typ) (Ohms) 40 CON (Typ) (pF) 12 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 185 Operating temperature range (C) -55 to 125 Features Break-before-make Input/output continuous current (Max) (mA) 25 Rating Catalog Supply current (Typ) (uA) 8
PDIP (N) 16 181 mm² 19.3 x 9.4 SOIC (D) 16 59 mm² 9.9 x 6
  • Wide Analog Input Voltage Range: ±5-V Maximum
  • Low ON-Resistance
    • 70-Ω Typical (VCC – VEE = 4.5 V)
    • 40-Ω Typical (VCC – VEE = 9 V)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • Break-Before-Make Switching
  • Wide Operating Temperature Range:
    –55°C to +125°C
  • CD54HC and CD74HC Types
    • Operation Control Voltage: 2 V to 6 V
    • Switch Voltage: 0 V to 10 V
  • CD54HCT and CD74HCT Types
    • Operation Control Voltage: 4.5 V to 5.5 V
    • Switch Voltage: 0 V to 10 V
    • Direct LSTTL Input Logic Compatibility
      VIL = 0.8-V Max, VIH = 2-V Min
    • CMOS Input Compatibility
      II  ≤ 1 µA at VOL, VOH
  • On Products Compliant to MIL-PRF-38535,
    All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.
  • Wide Analog Input Voltage Range: ±5-V Maximum
  • Low ON-Resistance
    • 70-Ω Typical (VCC – VEE = 4.5 V)
    • 40-Ω Typical (VCC – VEE = 9 V)
  • Low Crosstalk Between Switches
  • Fast Switching and Propagation Speeds
  • Break-Before-Make Switching
  • Wide Operating Temperature Range:
    –55°C to +125°C
  • CD54HC and CD74HC Types
    • Operation Control Voltage: 2 V to 6 V
    • Switch Voltage: 0 V to 10 V
  • CD54HCT and CD74HCT Types
    • Operation Control Voltage: 4.5 V to 5.5 V
    • Switch Voltage: 0 V to 10 V
    • Direct LSTTL Input Logic Compatibility
      VIL = 0.8-V Max, VIH = 2-V Min
    • CMOS Input Compatibility
      II  ≤ 1 µA at VOL, VOH
  • On Products Compliant to MIL-PRF-38535,
    All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

The CDx4HC405x and CDx4HCT405x devices are digitally controlled analog switches that use silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range (for example, VCC to VEE). They are bidirectional switches that allow any analog input to be used as an output and vice versa. The switches have low ON resistance and low OFF leakages. In addition, all these devices have an enable control that, when high, disables all switches to their OFF state.

The CDx4HC405x and CDx4HCT405x devices are digitally controlled analog switches that use silicon gate CMOS technology to achieve operating speeds similar to LSTTL with the low-power consumption of standard CMOS integrated circuits.

These analog multiplexers and demultiplexers control analog voltages that may vary across the voltage supply range (for example, VCC to VEE). They are bidirectional switches that allow any analog input to be used as an output and vice versa. The switches have low ON resistance and low OFF leakages. In addition, all these devices have an enable control that, when high, disables all switches to their OFF state.

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Technical documentation

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Type Title Date
* Data sheet CDx4HC405x, CDx4HCT405x High-Speed CMOS Logic Analog Multiplexers and Demultiplexers datasheet (Rev. M) PDF | HTML 22 May 2019
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Not available on TI.com
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PDIP (N) 16 View options
SOIC (D) 16 View options

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