Product details

Function Level translator, Single-ended Additive RMS jitter (Typ) (fs) 30 Output frequency (Max) (MHz) 200 Number of outputs 10 Output supply voltage (V) 3.3, 2.5, 1.8, 1.5 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 25 Features Pin control Operating temperature range (C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
Function Level translator, Single-ended Additive RMS jitter (Typ) (fs) 30 Output frequency (Max) (MHz) 200 Number of outputs 10 Output supply voltage (V) 3.3, 2.5, 1.8, 1.5 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 25 Features Pin control Operating temperature range (C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS
WQFN (RTV) 32 25 mm² 5 x 5
  • 10 LVCMOS/LVTTL Outputs, DC to 200 MHz
  • Universal Input
    • LVPECL
    • LVDS
    • HCSL
    • SSTL
    • LVCMOS / LVTTL
  • Crystal Oscillator Interface
    • Crystal Input Frequency: 10 to 40 MHz
  • Output Skew: 6 ps
  • Additive Phase Jitter
    • 30 fs at 156.25 MHz (12 kHz to 20 MHz)
  • Low Propagation Delay
  • Operates with 3.3 or 2.5 V Core Supply Voltage
  • Adjustable Output Power Supply
    • 1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank
  • 32 pin WQFN Package 5.0 × 5.0 × 0.8 mm
  • 10 LVCMOS/LVTTL Outputs, DC to 200 MHz
  • Universal Input
    • LVPECL
    • LVDS
    • HCSL
    • SSTL
    • LVCMOS / LVTTL
  • Crystal Oscillator Interface
    • Crystal Input Frequency: 10 to 40 MHz
  • Output Skew: 6 ps
  • Additive Phase Jitter
    • 30 fs at 156.25 MHz (12 kHz to 20 MHz)
  • Low Propagation Delay
  • Operates with 3.3 or 2.5 V Core Supply Voltage
  • Adjustable Output Power Supply
    • 1.5 V, 1.8 V, 2.5 V, and 3.3 V For Each Bank
  • 32 pin WQFN Package 5.0 × 5.0 × 0.8 mm

The LMK00101 is a high performance, low noise LVCMOS fanout buffer which can distribute 10 ultra-low jitter clocks from a differential, single ended, or crystal input. The LMK00101 supports synchronous output enable for glitch free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, telecom, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.

The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00101 can be easily configured through pin programming.

The LMK00101 is a high performance, low noise LVCMOS fanout buffer which can distribute 10 ultra-low jitter clocks from a differential, single ended, or crystal input. The LMK00101 supports synchronous output enable for glitch free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, telecom, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.

The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00101 can be easily configured through pin programming.

Download

Similar products you might be interested in

open-in-new Compare products
Same functionality with different pin-out to the compared device.
CDCLVC1310 ACTIVE Universal input, 10-output low impedance LVCMOS buffer Universal input, 10 output low impedance LVCMOS Buffer
Similar functionality to the compared device.
CDCVF2310 ACTIVE High performance 1:10 clock buffer for general purpose applications with support up to 105C High Performance 1:10 LVCMOS Clock Buffer

Technical documentation

star = Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 2
Type Title Date
* Data sheet Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator w/ Universal Input datasheet (Rev. C) 03 May 2013
User guide LMK00101 User’s Guide (Rev. A) 01 Jul 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

LMK00101 IBIS Model (Rev. A)

SNAM062A.ZIP (76 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Package Pins Download
WQFN (RTV) 32 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos