SN74AUC1G04

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Single 0.8-V to 2.7-V high speed inverter

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Product details

Parameters

Technology Family AUC Supply voltage (Min) (V) 0.8 Supply voltage (Max) (V) 2.7 Number of channels (#) 1 IOL (Max) (mA) 9 IOH (Max) (mA) -9 ICC (Max) (uA) 10 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs Rating Catalog open-in-new Find other Inverting buffer/driver

Package | Pins | Size

DSBGA (YZP) 5 2 mm² .927 x 1.427 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 5 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 5 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 open-in-new Find other Inverting buffer/driver

Features

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoFree™ Package
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial Power Down Mode and Back Drive Protection
  • Sub-1-V Operable
  • Max tpd of 2.2 ns at 1.8 V
  • Low Power Consumption, 10-µA Maximum ICC
  • ±8-mA Output Drive at 1.8 V

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Description

This single inverter gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G04 performs the Boolean function Y = A.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the ouput, preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, see Applications of Texas Instruments AUC Sub-1-V Little Logic Devices, SCEA027.

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Technical documentation

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Type Title Date
* Data sheet SN74AUC1G04 Single Inverter Gate datasheet (Rev. R) Jun. 08, 2017
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note How to Select Little Logic (Rev. A) Jul. 26, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices Mar. 21, 2003
User guide AUC Data Book, January 2003 (Rev. A) Jan. 01, 2003
Application note Texas Instruments Little Logic Application Report Nov. 01, 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS Mar. 27, 2002
More literature AUC Product Brochure (Rev. A) Mar. 18, 2002

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODEL Download
SCEJ128A.ZIP (91 KB) - HSpice Model
SIMULATION MODEL Download
SCEM217B.ZIP (55 KB) - IBIS Model
SIMULATION MODEL Download
SCEM729.ZIP (7 KB) - PSpice Model

Reference designs

参考设计 Download
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TIDM-RF430FRLSENSE This reference design provides a platform to evaluate the RF430FRL152H NFC Sensor Interface Transponder.  Directly out of the box, thermistor and photo transistor measurements can be communicated to an NFC enabled smart phone or other NFC/RFID Reader device.  This reference design can be (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
DSBGA (YZP) 5 View options
SC70 (DCK) 5 View options
SON (DRY) 6 View options
SOT-23 (DBV) 5 View options
SOT-5X3 (DRL) 5 View options

Ordering & quality

Information included:
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  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

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