Low-Power Single Inverter Gate
Product details
Parameters
Package | Pins | Size
Features
- Available in the Ultra Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch
- Low Static-Power Consumption
(ICC = 0.9 μA Max) - Low Dynamic-Power Consumption
(Cpd = 4.1 pF Typ at 3.3 V) - Low Input Capacitance (Ci = 1.5 pF Typ)
- Low Noise − Overshoot and Undershoot
<10% of VCC - Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
- Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V) - Wide Operating VCC Range of 0.8 V to 3.6 V
- Optimized for 3.3-V Operation
- 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- tpd = 3.9 ns Max at 3.3 V
- Suitable for Point-to-Point Applications
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model
(A114-B, Class II) - 1000-V Charged-Device Model (C101)
- 2000-V Human-Body Model
Description
The SN74AUP1G04 device is a single inverter gate performs the Boolean function Y = A.
Technical documentation
= Top documentation for this product selected by TI
Type | Title | Date | |
---|---|---|---|
* | Datasheet | SN74AUP1G04 Low-Power Single Inverter Gate datasheet (Rev. K) | Jun. 26, 2014 |
Selection guide | Little Logic Guide 2018 (Rev. G) | Jul. 06, 2018 | |
Application note | Designing and Manufacturing with TI's X2SON Packages | Aug. 23, 2017 | |
Selection guide | Logic Guide (Rev. AB) | Jun. 12, 2017 | |
White paper | Solving CMOS Transition Rate Issues Using Schmitt Trigger Solution (Rev. A) | May 01, 2017 | |
Application note | How to Select Little Logic (Rev. A) | Jul. 26, 2016 | |
Application note | Understanding Schmitt Triggers | Sep. 21, 2011 | |
Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | Jul. 08, 2004 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Design tools & simulation
SCEM423.ZIP (65 KB) - IBIS Model
SCEM692.ZIP (7 KB) - PSpice Model
Reference designs
TIDA-050001 — This reference design is to show two distinct ways to protect the TMDS lines of a HDMI 2.0 drivers and retimers from electrostatic discharge (ESD). The HDMI standard is used in many applications from set-topboxes to notebooks to TV's. Since these ports are almost always external they are susceptible (...)
Design files
-
download TIDA-050001 BOM.pdf (202KB) -
download TIDA-050001 Assembly Drawing.pdf (59KB) -
download TIDA-050001 PCB.pdf (1476KB) -
download TIDA-050001 CAD Files.zip (861KB) -
download TIDA-050001 Gerber.zip (1969KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
DSBGA (YFP) | 4 | View options |
SC70 (DCK) | 5 | View options |
SON (DRY) | 6 | View options |
SON (DSF) | 6 | View options |
SOT-23 (DBV) | 5 | View options |
SOT-5X3 (DRL) | 5 | View options |
X2SON (DPW) | 5 | View options |
Ordering & quality
Information included:
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
TI E2E™ forums with technical support from TI engineers
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