SN74CB3Q3251

ACTIVE

3.3-V, 8:1, 1-channel general-purpose FET bus switch

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3.3-V, 8:1, 1-channel general-purpose FET bus switch

SN74CB3Q3251

ACTIVE

Product details

Parameters

Configuration 8:1 Number of channels (#) 1 Power supply voltage - single (V) 2.5, 3.3 Ron (Typ) (Ohms) 3.5 Bandwidth (MHz) 500 Operating temperature range (C) -40 to 85 Features Powered-off protection, Supports input voltage beyond supply Input/output continuous current (Max) (mA) 64 Rating Catalog CON (Typ) (pF) 15 Supply current (Typ) (uA) 600 open-in-new Find other Analog switches & muxes

Package | Pins | Size

SSOP (DBQ) 16 29 mm² 4.9 x 6 TSSOP (PW) 16 22 mm² 4.4 x 5 TVSOP (DGV) 16 23 mm² 3.6 x 6.4 VQFN (RGY) 16 14 mm² 4 x 3.5 open-in-new Find other Analog switches & muxes

Features

  • High-Bandwidth Data Path (up to 500 MHz (1))
  • Equivalent to IDTQS3VH251 Device
  • 5-V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 4
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Description

The SN74CB3Q3251 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3251 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3251 is a 1-of-8 multiplexer/demultiplexer with a single output-enable (OE\) input. The select (S0, S1, S2) inputs control the data path of the multiplexer/demultiplexer. When OE\ is low, the multiplexer/demultiplexer is enabled, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the multiplexer/demultiplexer is disabled, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet SN74CB3Q3251 datasheet (Rev. A) Mar. 23, 2005
Application note Multiplexers and Signal Switches Glossary (Rev. A) Jun. 09, 2021
Application note CBT-C, CB3T, and CB3Q Signal-Switch Families (Rev. B) Jun. 08, 2021
Application note Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) Jan. 06, 2021
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Digital Bus Switch Selection Guide (Rev. A) Nov. 10, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Bus FET Switch Solutions for Live Insertion Applications Feb. 07, 2003

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

INTERFACE ADAPTER Download
document-generic User guide
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


INTERFACE ADAPTER Download
document-generic User guide
10
Description
The EVM-LEADLESS1 board allows for quick testing and bread boarding of TI's common leadless packages.  The board has footprints to convert TI's DRC, DTP, DQE, RBW, RGY, RSE, RSV, RSW RTE, RTJ, RUK , RUC, RUG, RUM,RUT and YZP surface mount packages to 100mil DIP headers.
Features
  • Quick testing of TI's surface mount packages 
  • Allows suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 16 most popular leadless packages with a single panel

Design tools & simulation

SIMULATION MODEL Download
SCDM077.ZIP (42 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
SSOP (DBQ) 16 View options
TSSOP (PW) 16 View options
TVSOP (DGV) 16 View options
VQFN (RGY) 16 View options

Ordering & quality

Information included:
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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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