SN74CBTLV3125

ACTIVE

3.3-V, 1:1 (SPST), 4-channel FET bus switch with powered-off protection

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3.3-V, 1:1 (SPST), 4-channel FET bus switch with powered-off protection

SN74CBTLV3125

ACTIVE

Product details

Parameters

Configuration 1:1 SPST Number of channels (#) 4 Power supply voltage - single (V) 2.5, 3.3 Ron (Typ) (Ohms) 5 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (C) -40 to 85 Features Powered-off protection, Supports JTAG signals, Supports SPI signals Input/output continuous current (Max) (mA) 128 Rating Catalog open-in-new Find other Analog switches & muxes

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 SSOP (DBQ) 16 29 mm² 4.9 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23 mm² 3.6 x 6.4 VQFN (RGY) 14 12 mm² 3.5 x 3.5 open-in-new Find other Analog switches & muxes

Features

  • Standard ’125-Type Pinout
  • 5- Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

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Description

The SN74CBTLV3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE\) input is high.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Exact equivalent in functionality and parametrics to the compared device:
TMUX1511 ACTIVE 5-V, 1:1 (SPST), 4-channel analog switch with powered-off protection & 1.8-V input logic Upgraded 3-GHz bandwidth, 2-Ω RON, and 1.8-V logic support

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 19
Type Title Date
* Datasheet SN74CBTLV3125 datasheet (Rev. J) Oct. 10, 2003
Application note Selecting the Right Texas Instruments Signal Switch (Rev. B) Apr. 02, 2020
Application note Multiplexers and Signal Switches Glossary Mar. 06, 2020
Application note Eliminate power Sequencing with powered-off protection signal switches (Rev. B) Jan. 15, 2019
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note How to Select Little Logic (Rev. A) Jul. 26, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Digital Bus Switch Selection Guide (Rev. A) Nov. 10, 2004
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Bus FET Switch Solutions for Live Insertion Applications Feb. 07, 2003
Application note Texas Instruments Little Logic Application Report Nov. 01, 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) Dec. 01, 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

INTERFACE ADAPTER Download
10
Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

Features
  • Quick testing of TI's leaded surface mount packages 
  • Allows leaded suface mount packages to be plugged into 100mil spaced bread board 
  • Supports TI's 8 most popular leaded packages with a single panel


Design tools & simulation

SIMULATION MODEL Download
SCDM027.ZIP (25 KB) - IBIS Model
SIMULATION MODEL Download
SCDM132.ZIP (111 KB) - HSpice Model

CAD/CAE symbols

Package Pins Download
SOIC (D) 14 View options
SSOP (DBQ) 16 View options
TSSOP (PW) 14 View options
TVSOP (DGV) 14 View options
VQFN (RGY) 14 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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