The SN74CBTLV3126 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low.

This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging current will not backflow through the device when it is powered down. The SN74CBTLV3126 device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pull down resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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	Type	Title	Date
*	Datasheet	SN74CBTLV3126 Low-voltage quadruple FET bus switch datasheet (Rev. J)	Jan. 14, 2019
	Application note	Selecting the Right Texas Instruments Signal Switch (Rev. B)	Apr. 02, 2020
	Application note	Multiplexers and Signal Switches Glossary	Mar. 06, 2020
	Application note	Eliminate power Sequencing with powered-off protection signal switches (Rev. B)	Jan. 15, 2019
	Selection guide	Little Logic Guide 2018 (Rev. G)	Jul. 06, 2018
	Selection guide	Logic Guide (Rev. AB)	Jun. 12, 2017
	Application note	How to Select Little Logic (Rev. A)	Jul. 26, 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	Dec. 02, 2015
	User guide	LOGIC Pocket Data Book (Rev. B)	Jan. 16, 2007
	More literature	Digital Bus Switch Selection Guide (Rev. A)	Nov. 10, 2004
	More literature	Design Summary for WCSP Little Logic (Rev. B)	Nov. 04, 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	Jul. 08, 2004
	User guide	Signal Switch Data Book (Rev. A)	Nov. 14, 2003
	More literature	Logic Cross-Reference (Rev. A)	Oct. 07, 2003
	Application note	Bus FET Switch Solutions for Live Insertion Applications	Feb. 07, 2003
	Application note	Texas Instruments Little Logic Application Report	Nov. 01, 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	Aug. 29, 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	Jun. 13, 2002
	User guide	CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B)	Dec. 01, 1998

Design & development

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Hardware development

INTERFACE ADAPTER Download

Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

LEADED-ADAPTER1

Description

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.

Features

Quick testing of TI's leaded surface mount packages
Allows leaded suface mount packages to be plugged into 100mil spaced bread board
Supports TI's 8 most popular leaded packages with a single panel

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