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Fixed-direction voltage translators

SN74LV1T126

ACTIVE

Single Power Supply, Single BUFFER GATE w/ 3-State Output (active high enable)

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Data sheet

SN74LV1T126

ACTIVE
Data sheet Order now

Product details

Technology family LV1T Applications GPIO, I2S, UART Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 1 High input voltage (max) (V) 5.5 Vout (min) (V) 46138 Vout (max) (V) 5.5 Data rate (max) (MBps) 100 IOH (max) (mA) -8 IOL (max) (mA) -8 Supply current (max) (µA) 5.5 Features 4.2, 4.64 Input type TTL-Compatible CMOS Output type 3-State, Balanced CMOS Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV1T Applications GPIO, I2S, UART Bits (#) 1 Configuration 1 Ch A to B 0 Ch B to A High input voltage (min) (V) 1 High input voltage (max) (V) 5.5 Vout (min) (V) 46138 Vout (max) (V) 5.5 Data rate (max) (MBps) 100 IOH (max) (mA) -8 IOL (max) (mA) -8 Supply current (max) (µA) 5.5 Features 4.2, 4.64 Input type TTL-Compatible CMOS Output type 3-State, Balanced CMOS Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 2.5 mm² 2 x 1.25
  • Single-supply voltage translator at 5-V, 3.3-V, 2.5-V, and 1.8-V VCC
  • Operating range of 1.8 V to 5.5 V
  • Up translation:
    • 1.2 V(1) to 1.8 V at 1.8-V VCC
    • 1.5 V(1) to 2.5 V at 2.5-V VCC
    • 1.8 V(1) to 3.3 V at 3.3-V VCC
    • 3.3 V to 5.0 V at 5.0-V VCC
  • Down translation:
    • 3.3 V to 1.8 V at 1.8-V VCC
    • 3.3 V to 2.5 V at 2.5-V VCC
    • 5.0 V to 3.3 V at 3.3-V VCC
  • Logic output is referenced to VCC
  • Output drive:
    • 8 mA output drive at 5 V
    • 7 mA output drive at 3.3 V
    • 3 mA output drive at 1.8 V
  • Characterized up to 50 MHz at 3.3-V VCC
  • 5V Tolerance on input pins
  • –40°C to 125°C operating temperature range
  • Latch-Up Performance Exceeds 250 mAPer JESD 17
  • Supports standard logic pinouts
  • CMOS output B compatible with AUP1G and LVC1G families (1)

(1)Refer to the VIH/VIL and output drive for lower VCC condition.
  • Single-supply voltage translator at 5-V, 3.3-V, 2.5-V, and 1.8-V VCC
  • Operating range of 1.8 V to 5.5 V
  • Up translation:
    • 1.2 V(1) to 1.8 V at 1.8-V VCC
    • 1.5 V(1) to 2.5 V at 2.5-V VCC
    • 1.8 V(1) to 3.3 V at 3.3-V VCC
    • 3.3 V to 5.0 V at 5.0-V VCC
  • Down translation:
    • 3.3 V to 1.8 V at 1.8-V VCC
    • 3.3 V to 2.5 V at 2.5-V VCC
    • 5.0 V to 3.3 V at 3.3-V VCC
  • Logic output is referenced to VCC
  • Output drive:
    • 8 mA output drive at 5 V
    • 7 mA output drive at 3.3 V
    • 3 mA output drive at 1.8 V
  • Characterized up to 50 MHz at 3.3-V VCC
  • 5V Tolerance on input pins
  • –40°C to 125°C operating temperature range
  • Latch-Up Performance Exceeds 250 mAPer JESD 17
  • Supports standard logic pinouts
  • CMOS output B compatible with AUP1G and LVC1G families (1)

(1)Refer to the VIH/VIL and output drive for lower VCC condition.

The SN74LV1T126 is a single buffer gate with reduced input thresholds to support voltage translation applications.

The SN74LV1T126 is a single buffer gate with reduced input thresholds to support voltage translation applications.
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Technical documentation

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Type Title Date
* Data sheet SN74LV1T126 Single Power Supply Single Buffer Gate with 3-State Output CMOS Logic Level Shifter datasheet (Rev. B) PDF | HTML 10 Jun 2022
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 30 Apr 2015
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic EVM supporting 5 through 8 pin DCK, DCT, DCU, DRL, and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74LV1T126 Behavioral SPICE Model

SCLM182.ZIP (7 KB) - PSpice Model
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Simulation model

SN74LV1T126 IBIS Model

SCLM110.ZIP (57 KB) - IBIS Model
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Simulation model

SN74LV1T126 PSpice Model

SCEM570.ZIP (22 KB) - PSpice Model
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Reference designs

TIDA-01572 — Stereo Evaluation Module Reference Design of the Digital Input, Class-D, IV Sense Audio Amplifier

This reference design provides a high-performance stereo audio subsystem for use in PC applications. It operates off a single supply, ranging from 4.5 V to 16 V, and features the TAS2770, a digital-input Class-D audio amplifier that provides excellent noise and distortion performance and is (...)
Design guide: PDF
Schematic: PDF
Package Pins Download
SOT-23 (DBV) 5 View options
SOT-SC70 (DCK) 5 View options
TI's Standard Terms and Conditions for Evaluation Items apply.

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