The 'LV367A devices are hex buffers and line drivers designed for 2-V to 5.5-V VCC operation. These devices are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The 'LV367A devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE\ and 2OE\) inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||IOL (Max) (mA)||IOH (Max) (mA)||ICC (uA)||Input type||Output type||Features||Data rate (Mbps)||Rating||Package Group|
Very high speed (tpd 5-10ns)
Partial power down (Ioff)
Over-voltage tolerant inputs
SOIC | 16
SO | 16
TSSOP | 16
TVSOP | 16