SN74LV4T125

• Single-Supply Voltage Translator at
  5.0-V, 3.3-V, 2.5-V, and 1.8-V V_CC
• Operating Range of 1.8 V to 5.5 V
• Up Translation
  • 1.2 V⁽¹⁾ to 1.8 V at 1.8-V V_CC
  • 1.5 V⁽¹⁾ to 2.5 V at 2.5-V V_CC
  • 1.8 V⁽¹⁾ to 3.3 V at 3.3-V V_CC
  • 3.3 V to 5.0 V at 5.0-V V_CC
• Down Translation
  • 3.3 V to 1.8 V at 1.8-V V_CC
  • 3.3 V to 2.5 V at 2.5-V V_CC
  • 5.0 V to 3.3 V at 3.3-V V_CC
• Logic Output is Referenced to V_CC
• Characterized up to 50 MHz at 3.3-V V_CC
• 5.5 V Tolerance on Input Pins
• –40°C to 125°C Operating Temperature Range
• Pb-Free Packages Available: SC-70 (RGY)
  • 3.5 × 3.5 × 1 mm
• Latch-Up Performance Exceeds 250 mA Per
  JESD 17
• ESD Performance Tested Per JESD 22
  • 2000-V Human-Body Model (A114-B, Class II)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
• Supports Standard Logic Pinouts
• CMOS Output B Compatible with AUP125, LVC125 Refer the V_IH/V_IL and output drive for lower V_CC condition.

SN74LV4T125 is a low-voltage CMOS buffer gate that operates at a wider voltage range for portable, telecom, industrial, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to match 1.8-V input logic at V_CC = 3.3 V and can be used in 1.8 V to 3.3 V level-up translation. In addition, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output at V_CC = 2.5 V). The wide V_CC range of 1.8 V to 5.5 V allows the generation of desired output levels to connect to controllers or processors.

The SN74LV4T125 device is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.