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SN74LVC125A-Q1

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Automotive 4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

Data sheet
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Automotive 4-ch, 1.65-V to 3.6-V buffers with 3-state outputs

SN74LVC125A-Q1

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Data sheet Order now

Product details

Parameters

Technology Family LVC VCC (Min) (V) 1.65 VCC (Max) (V) 3.6 Channels (#) 4 IOL (Max) (mA) 24 ICC (Max) (uA) 20 IOH (Max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns), Over-voltage tolerant inputs Data rate (Mbps) 200 Rating Automotive open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other Non-Inverting buffer/driver

Features

  • Qualified for Automotive Applications
  • Operates From 1.65 V to 3.6 V
  • Specified From -40°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.8 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Description

This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

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Technical documentation

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Type Title Date
* Datasheet Quadruple Bus Buffer Gate With 3-State Outputs datasheet (Rev. B) Apr. 09, 2008
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note How to Select Little Logic (Rev. A) Jul. 26, 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits Nov. 06, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) Dec. 18, 2002
Application note Texas Instruments Little Logic Application Report Nov. 01, 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS Mar. 27, 2002
More literature Military Low Voltage Solutions Apr. 04, 2001
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note LVC Characterization Information Dec. 01, 1996
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
User guide Low-Voltage Logic (LVC) Designer's Guide Sep. 01, 1996
Application note Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
View details

Design tools & simulation

SIMULATION MODEL Download
SCAM111.ZIP (7 KB) - PSpice Model

Reference designs

REFERENCE DESIGNS Download
Automotive 8-Channel Class-D Amplifier with 2.1 MHz Switching Power Supply Reference Design
TIDA-00733 — TIDA-00733 is a reference design for an eight-channel, Class-D amplifier that is capable of driving 2-Ω loads and an off-battery step-down power supply with 5-V and  3.3-V outputs. The amplifier design provides audio inputs for each audio channel. A  high-performance audio (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Thermal Protection Reference Design of IGBT Modules for HEV/EV Traction Inverters
TIDA-00794 — The TIDA-00794 reference design is a temp sensing solution for IGBT thermal protection in HEV/EV traction inverter system. It monitors the IGBT temperature via the NTC thermistor integrated inside the IGBT module. It provides thermal shut down to the IGBT gate drivers once the NTC thermistor (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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