SN74LVC1G08-Q1

ACTIVE

Product details

Technology family LVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (MBits) 100 Rating Automotive Operating temperature range (°C) -40 to 125, -40 to 85
Technology family LVC Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 1 Inputs per channel 2 IOL (max) (mA) 32 IOH (max) (mA) -32 Input type Standard CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Data rate (max) (MBits) 100 Rating Automotive Operating temperature range (°C) -40 to 125, -40 to 85
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 2.5 mm² 2 x 1.25 USON (DRY) 6 1.45 mm² 1.45 x 1
  • AEC-Q100 Qualified for Automotive Applications:
    • Device Temperature Grade 1: –40°C to +125°C, TA
  • Supports 5-V VCC Operation
  • Over-voltage Tolerant Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • AEC-Q100 Qualified for Automotive Applications:
    • Device Temperature Grade 1: –40°C to +125°C, TA
  • Supports 5-V VCC Operation
  • Over-voltage Tolerant Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or in positive logic.

This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08 is available in a variety of packages, including the small DRY package with a body size of 1.45 mm × 1.00 mm.

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G08-Q1 device performs the Boolean function or in positive logic.

This device is fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08 is available in a variety of packages, including the small DRY package with a body size of 1.45 mm × 1.00 mm.

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Technical documentation

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Type Title Date
* Data sheet SN74LVC1G08-Q1 Single 2-input positive-AND gate datasheet (Rev. G) PDF | HTML 20 May 2019
More literature Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Functional safety information SN74LVC1G08-Q1 Functional Safety FIT Rate and Failure Mode Distribution 30 Dec 2019
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
More literature How to Select Little Logic (Rev. A) 26 Jul 2016
More literature Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature Automotive Logic Devices Brochure 27 Aug 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
More literature Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
More literature Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
More literature Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
More literature Texas Instruments Little Logic Application Report 01 Nov 2002
More literature TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
More literature 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
More literature Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
More literature Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
More literature Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
More literature CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
More literature LVC Characterization Information 01 Dec 1996
More literature Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
More literature Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

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Simulation model

SN74LVC1G08 Behavioral SPICE Model

SCEM642.ZIP (7 KB) - PSpice Model
Reference designs

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Schematic: PDF
Package Pins Download
SOT-23 (DBV) 5 View options
SOT-SC70 (DCK) 5 View options
USON (DRY) 6 View options

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