2-ch, 2-input, 1.65-V to 5.5-V XOR (exclusive OR) gates
Product details
Parameters
Package | Pins | Size
Features
- Available in the Texas Instruments NanoFree Package
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 4.7 ns at 3.3 V
- Low Power Consumption, 10-μA Max ICC
- ±24-mA Output Drive at 3.3 V
- Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C - Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C - Ioff Supports Live Insertion, Partial-Power-Down Mode and Back Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Description
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
A common application is as a true/complement element. If the input is low, the other input is reproduced in true form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Features
- Board design allows for versatility in evaluation
- Supports a wide-range of logic devices
Design tools & simulation
Reference designs
Design files
-
download TIDA-00548 BOM.pdf (216KB) -
download TIDA-00548 Assembly Drawing.pdf (420KB) -
download TIDA-00548 PCB.pdf (3870KB) -
download TIDA-00548 CAD Files.zip (2468KB) -
download TIDA-00548 Gerber.zip (604KB)
Design files
-
download TIDA-01552 BOM.pdf (41KB) -
download TIDA-01552 Assembly Drawing.pdf (429KB) -
download TIDA-01552 PCB.pdf (2519KB) -
download TIDA-01552 Altium.zip (2617KB) -
download TIDA-01552 Gerber.zip (456KB)
Design files
-
download TIDA-01333 BOM.pdf (77KB) -
download TIDA-01333 Assembly Drawing.pdf (712KB) -
download TIDA-01333 PCB.pdf (3833KB) -
download TIDA-01333 Altium.zip (2244KB) -
download TIDA-01333 Gerber.zip (623KB)
Design files
-
download TIDA-00550 BOM.pdf (167KB) -
download TIDA-00550 Assembly Drawing .pdf (653KB) -
download TIDA-00550 PCB.pdf (5531KB) -
download TIDA-00550 PCB 3D Print.pdf (3186KB) -
download TIDA-00550 CAD Files.zip (2146KB) -
download TIDA-00550 Gerber.zip (663KB)
Design files
-
download TIDA-00560 BOM.pdf (84KB) -
download TIDA-00560 Assembly Drawing.pdf (153KB) -
download TIDA-00560 PCB 3D Print.pdf (3862KB) -
download TIDA-00560 PCB.pdf (895KB) -
download TIDA-00560 CAD Files.zip (810KB) -
download TIDA-00560 Gerber.zip (205KB)
Design files
-
download TIDA-00764 BOM.pdf (77KB) -
download TIDA-00764 Assembly Drawing .pdf (690KB) -
download TIDA-00764 PCB.pdf (3865KB) -
download TIDA-00764 CAD Files.zip (2326KB) -
download TIDA-00764 Gerber.zip (601KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
DSBGA (YZP) | 8 | View options |
SM8 (DCT) | 8 | View options |
VSSOP (DCU) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Support & training
TI E2E™ forums with technical support from TI engineers
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